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公开(公告)号:US20150108584A1
公开(公告)日:2015-04-23
申请号:US14582429
申请日:2014-12-24
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor: Yangsoo Son , Hyerim Moon , Hagju Cho , Jeongnam Han , Joon Goo Hong
CPC classification number: H01L27/1104 , H01L21/823462 , H01L27/0207 , H01L29/1037 , H01L29/401 , H01L29/517 , H01L29/7848
Abstract: A semiconductor device includes a first device isolation pattern defining a first active region, a second device isolation pattern defining a second active region, a first gate disposed on the first active region, the first gate including a gate insulating pattern of a first thickness and a second gate disposed on the second active region, the second gate including a gate insulating pattern of a second thickness greater than the first thickness. A top surface of the first device isolation pattern is curved down toward the first active region such that the first active region has an upper portion protruded from the top surface and rounded corners.
Abstract translation: 半导体器件包括限定第一有源区的第一器件隔离图案,限定第二有源区的第二器件隔离图案,设置在第一有源区上的第一栅极,第一栅极包括第一厚度的栅极绝缘图案和 第二栅极,其设置在第二有源区上,第二栅极包括具有大于第一厚度的第二厚度的栅极绝缘图案。 第一器件隔离图案的顶表面朝向第一有源区域向下弯曲,使得第一有源区域具有从顶表面和圆角突出的上部。
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公开(公告)号:US10062691B2
公开(公告)日:2018-08-28
申请号:US15460897
申请日:2017-03-16
Applicant: Samsung Electronics Co., Ltd.
Inventor: Hyerim Moon , Myounghun Choi
IPC: H01L29/40 , H01L21/44 , H01L27/088 , H01L27/092 , H01L21/8234 , H01L27/02 , H01L27/06 , H01L23/528
CPC classification number: H01L27/0886 , H01L21/823431 , H01L21/823475 , H01L23/5283 , H01L27/0207 , H01L27/0629 , H01L27/0924 , H01L29/0649 , H01L29/0657 , H01L29/41791 , H01L29/861
Abstract: A semiconductor device includes merged contact plugs. A multi-fin active having N sub-fins is formed in a substrate. A contact plug is formed on the impurity areas. N is an integer between about eight (8) and about one thousand (1000). The N sub-fins include a first sub-fin formed in the outermost portion of the multi-fin active and a second sub-fin formed near the first sub-fin. A straight line perpendicular to a surface of the substrate and passes through a virtual bottom edge of the contact plug is disposed between the first sub-fin and the second sub-fin, or through the second sub-fin. The virtual bottom edge of the contact plug is defined at a cross point of a correlation line extending on a side surface of the contact plug and a horizontal line in contact with a lowermost end of the contact plug and parallel to the surface of the substrate.
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公开(公告)号:US20180350804A1
公开(公告)日:2018-12-06
申请号:US16046394
申请日:2018-07-26
Applicant: Samsung Electronics Co., Ltd.
Inventor: Hyerim Moon , Myounghun Choi
IPC: H01L27/088 , H01L21/8234 , H01L27/092 , H01L27/02 , H01L27/06 , H01L23/528
Abstract: A semiconductor device includes merged contact plugs. A multi-fin active having N sub-fins is formed in a substrate. A contact plug is formed on the impurity areas. N is an integer between about eight (8) and about one thousand (1000). The N sub-fins include a first sub-fin formed in the outermost portion of the multi-fin active and a second sub-fin formed near the first sub-fin. A straight line perpendicular to a surface of the substrate and passes through a virtual bottom edge of the contact plug is disposed between the first sub-fin and the second sub-fin, or through the second sub-fin. The virtual bottom edge of the contact plug is defined at a cross point of a correlation line extending on a side surface of the contact plug and a horizontal line in contact with a lowermost end of the contact plug and parallel to the surface of the substrate.
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公开(公告)号:US10529714B2
公开(公告)日:2020-01-07
申请号:US16046394
申请日:2018-07-26
Applicant: Samsung Electronics Co., Ltd.
Inventor: Hyerim Moon , Myounghun Choi
IPC: H01L29/40 , H01L21/44 , H01L27/088 , H01L27/092 , H01L21/8234 , H01L27/02 , H01L27/06 , H01L23/528 , H01L29/861 , H01L29/06
Abstract: A semiconductor device includes merged contact plugs. A multi-fin active having N sub-fins is formed in a substrate. A contact plug is formed on the impurity areas. N is an integer between about eight (8) and about one thousand (1000). The N sub-fins include a first sub-fin formed in the outermost portion of the multi-fin active and a second sub-fin formed near the first sub-fin. A straight line perpendicular to a surface of the substrate and passes through a virtual bottom edge of the contact plug is disposed between the first sub-fin and the second sub-fin, or through the second sub-fin. The virtual bottom edge of the contact plug is defined at a cross point of a correlation line extending on a side surface of the contact plug and a horizontal line in contact with a lowermost end of the contact plug and parallel to the surface of the substrate.
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公开(公告)号:US20130149835A1
公开(公告)日:2013-06-13
申请号:US13690456
申请日:2012-11-30
Applicant: Samsung Electronics Co., Ltd.
Inventor: Yangsoo Son , Hyerim Moon , Hagju Cho , Jeongnam Han , Joon Goo Hong
IPC: H01L29/40
CPC classification number: H01L27/1104 , H01L21/823462 , H01L27/0207 , H01L29/1037 , H01L29/401 , H01L29/517 , H01L29/7848
Abstract: A semiconductor device includes a first device isolation pattern defining a first active region, a second device isolation pattern defining a second active region, a first gate disposed on the first active region, the first gate including a gate insulating pattern of a first thickness and a second gate disposed on the second active region, the second gate including a gate insulating pattern of a second thickness greater than the first thickness. A top surface of the first device isolation pattern is curved down toward the first active region such that the first active region has an upper portion protruded from the top surface and rounded corners.
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