公开(公告)号：US20240274499A1

公开(公告)日：2024-08-15

申请号：US18643144

申请日：2024-04-23

Applicant: Samsung Electronics Co., Ltd.

Inventor： Ae-Nee JANG ,  In Hyo HWANG

IPC: H01L23/373 ,  H01L23/00 ,  H01L23/367 ,  H01L23/498 ,  H01L25/065 ,  H01L25/10

CPC classification number: H01L23/3735 ,  H01L23/367 ,  H01L23/49816 ,  H01L23/49822 ,  H01L23/49833 ,  H01L23/49838 ,  H01L24/16 ,  H01L24/32 ,  H01L24/73 ,  H01L25/0655 ,  H01L25/105 ,  H01L2224/16227 ,  H01L2224/16237 ,  H01L2224/32225 ,  H01L2224/73204 ,  H01L2225/1023 ,  H01L2225/1058 ,  H01L2225/107 ,  H01L2225/1094 ,  H01L2924/1431 ,  H01L2924/1434 ,  H01L2924/3511 ,  H01L2924/3512

Abstract: Provided is a semiconductor package including a stiffener. The semiconductor package comprises a circuit board, a semiconductor chip on the circuit board, and a stiffener around the semiconductor chip, wherein the stiffener includes a first metal layer, a core layer, and a second metal layer sequentially stacked.

公开(公告)号：US20240096820A1

公开(公告)日：2024-03-21

申请号：US18334100

申请日：2023-06-13

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Young Lyong KIM ,  Hyun Soo CHUNG ,  In Hyo HWANG

IPC: H01L23/00 ,  H01L21/56 ,  H01L23/16 ,  H01L23/31 ,  H01L23/498 ,  H01L23/538 ,  H01L25/00 ,  H01L25/065 ,  H10B80/00

CPC classification number: H01L23/562 ,  H01L21/563 ,  H01L23/16 ,  H01L23/3135 ,  H01L23/49816 ,  H01L23/5383 ,  H01L23/5385 ,  H01L24/16 ,  H01L24/32 ,  H01L24/73 ,  H01L25/0655 ,  H01L25/50 ,  H10B80/00 ,  H01L2224/16225 ,  H01L2224/32225 ,  H01L2224/73204

Abstract: A method for manufacturing a semiconductor package includes mounting semiconductor chips on an interposer, forming a molding part between the semiconductor chips, surrounding a plurality of bumps between the semiconductor chips and the interposer with a first underfill, forming a sacrificial layer that covers the semiconductor chips, forming a wafer level molding layer that covers the sacrificial layer, performing a planarization process to expose upper sides of the semiconductor chips, form the sacrificial layer into a sacrificial pattern, and form the wafer level molding layer into a wafer level molding pattern, removing the sacrificial pattern, performing a sawing process to remove an outer edge of the semiconductor package, mounting the interposer on a side of a package board, surrounding a plurality of bumps between the package board and the interposer with a second underfill, and attaching a stiffener to an outer portion of the package board.

公开(公告)号：US20220068756A1

公开(公告)日：2022-03-03

申请号：US17387212

申请日：2021-07-28

Applicant: Samsung Electronics Co., Ltd.

Inventor： Ae-Nee JANG ,  In Hyo HWANG

IPC: H01L23/373 ,  H01L25/10 ,  H01L25/065 ,  H01L23/00 ,  H01L23/498 ,  H01L23/367

Abstract: Provided is a semiconductor package including a stiffener. The semiconductor package comprises a circuit board, a semiconductor chip on the circuit board, and a stiffener around the semiconductor chip, wherein the stiffener includes a first metal layer, a core layer, and a second metal layer sequentially stacked.