公开(公告)号：US20170062575A1

公开(公告)日：2017-03-02

申请号：US15238721

申请日：2016-08-16

Applicant: Samsung Electronics Co., Ltd.

Inventor： JUNGWOO SONG ,  JAEKYU LEE ,  JAEROK KAHNG ,  YongJun KIM

IPC: H01L29/40 ,  H01L27/22 ,  H01L27/108 ,  H01L29/78 ,  H01L29/66

CPC classification number: H01L29/408 ,  H01L27/10811 ,  H01L27/10823 ,  H01L27/10852 ,  H01L27/10855 ,  H01L27/10891 ,  H01L27/228 ,  H01L29/4236 ,  H01L29/66666 ,  H01L29/7827

Abstract: A semiconductor device includes active pillars protruding from a semiconductor substrate and spaced apart from each other in a first direction and a second direction that is perpendicular to the first direction, a word line extending in the first direction between the active pillars, a drain region disposed in an upper portion of each of the active pillars, and a separation pattern provided between the word line and the drain region. A bottom surface of the separation pattern is disposed at a lower level than a bottom surface of the drain region.

Abstract translation: 半导体器件包括从半导体衬底突出并且在垂直于第一方向的第一方向和第二方向彼此间隔开的有源柱，在有源柱之间沿第一方向延伸的字线，设置的漏极区 在每个活动柱的上部，以及设置在字线和漏区之间的分离图案。 分离图案的底表面设置在比漏区的底表面更低的水平处。

公开(公告)号：US20210375764A1

公开(公告)日：2021-12-02

申请号：US17399043

申请日：2021-08-10

Applicant: Samsung Electronics Co., Ltd.

Inventor： JUNGWOO SONG ,  Ye-Ro LEE ,  Kwangtae HWANG ,  Kwangmin KIM ,  YONG KWAN KIM ,  JIYOUNG KIM

IPC: H01L23/532 ,  H01L27/02 ,  H01L27/108 ,  H01L21/768

Abstract: A semiconductor device including a substrate includes an active region. A bit line structure extends across the active region. A landing pad is disposed on an end portion of the active region. A first spacer is disposed between the bit line structure and the landing pad. A second spacer is disposed between the first spacer and the landing pad. An air spacer is disposed between the first spacer and the second spacer. A capping pattern is disposed between a sidewall of the landing pad and a sidewall of the bit line structure. The capping pattern defines a top surface of the air spacer and comprises a metallic material.

公开(公告)号：US20180174971A1

公开(公告)日：2018-06-21

申请号：US15706655

申请日：2017-09-15

Applicant: Samsung Electronics Co., Ltd.

Inventor： JUNGWOO SONG ,  Ye-Ro LEE ,  Kwangtae HWANG ,  Kwangmin KIM ,  YONG KWAN KIM ,  JIYOUNG KIM

IPC: H01L23/532 ,  H01L27/108 ,  H01L27/02

Abstract: A semiconductor device including a substrate includes an active region. A bit line structure extends across the active region. A landing pad is disposed on an end portion of the active region. A first spacer is disposed between the bit line structure and the landing pad. A second spacer is disposed between the first spacer and the landing pad. An air spacer is disposed between the first spacer and the second spacer. A capping pattern is disposed between a sidewall of the landing pad and a sidewall of the bit line structure. The capping pattern defines a top surface of the air spacer and comprises a metallic material.

公开(公告)号：US20200006231A1

公开(公告)日：2020-01-02

申请号：US16561008

申请日：2019-09-04

Applicant: Samsung Electronics Co., Ltd.

Inventor： JUNGWOO SONG ,  Ye-Ro LEE ,  Kwangtae HWANG ,  Kwangmin KIM ,  YONG KWAN KIM ,  JIYOUNG KIM

IPC: H01L23/532 ,  H01L27/02 ,  H01L27/108

Abstract: A semiconductor device including a substrate includes an active region. A bit line structure extends across the active region. A landing pad is disposed on an end portion of the active region. A first spacer is disposed between the bit line structure and the landing pad. A second spacer is disposed between the first spacer and the landing pad. An air spacer is disposed between the first spacer and the second spacer. A capping pattern is disposed between a sidewall of the landing pad and a sidewall of the bit line structure. The capping pattern defines a top surface of the air spacer and comprises a metallic material.

公开(公告)号：US20190164975A1

公开(公告)日：2019-05-30

申请号：US16108786

申请日：2018-08-22

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： JUNGWOO SONG ,  Kwangmin Kim ,  Jun Ho Lee ,  Hyuckjin Kang ,  Yong Kwan Kim ,  Sangyeon Han ,  Seguen Park

IPC: H01L27/108 ,  H01L23/532 ,  H01L29/06

Abstract: Provided are a semiconductor memory device and a method of fabricating the same. The semiconductor memory device may include: a first impurity doped region and a second impurity doped region spaced apart from each other in a semiconductor substrate, a bit line electrically connected to the first impurity doped region and crossing over the semiconductor substrate, a storage node contact electrically connected to the second impurity doped region, a first spacer and a second spacer disposed between the bit line and the storage node contact, and an air gap region disposed between the first spacer and the second spacer. The first spacer may cover a sidewall of the bit line, and the second spacer may be adjacent to the storage node contact. A top end of the first spacer may have a height higher than a height of a top end of the second spacer.

公开(公告)号：US20150123196A1

公开(公告)日：2015-05-07

申请号：US14598228

申请日：2015-01-16

Applicant: Samsung Electronics Co., Ltd.

Inventor： JUNGWOO SONG ,  JAEKYU LEE

IPC: H01L23/528 ,  H01L23/522 ,  H01L29/423 ,  H01L27/108 ,  H01L27/11

CPC classification number: H01L23/528 ,  H01L23/5226 ,  H01L27/0203 ,  H01L27/10 ,  H01L27/105 ,  H01L27/108 ,  H01L27/11 ,  H01L27/228 ,  H01L27/2436 ,  H01L27/2463 ,  H01L29/4236 ,  H01L45/04 ,  H01L45/06 ,  H01L45/1233 ,  H01L45/143 ,  H01L45/144 ,  H01L45/146 ,  H01L45/147 ,  H01L45/16 ,  H01L2924/0002 ,  H01L2924/00

Abstract: Provided are data storage devices and methods of manufacturing the same. The device may include a plurality of cell selection parts formed in a substrate, a plate conductive pattern covering the cell selection parts and electrically connected to first terminals of the cell selection parts, a plurality of through-pillars penetrating the plate conductive pattern and insulated from the plate conductive pattern, and a plurality of data storage parts directly connected to the plurality of through-pillars, respectively. The data storage parts may be electrically connected to second terminals of the cell selection parts, respectively.

Abstract translation: 提供数据存储装置及其制造方法。 该器件可以包括形成在衬底中的多个电池选择部件，覆盖电池选择部分并电连接到电池选择部件的第一端子的板状导电图案，穿过板状导电图案并与之绝缘的多个贯通柱 板状导电图案，以及分别与多个贯通柱直接连接的多个数据存储部。 数据存储部分可以分别电连接到小区选择部分的第二终端。