Abstract:
A static random access memory device includes a plurality of memory cells arranged in rows and columns, a write driver configured to apply a bit line voltage corresponding to write data to a bit line extending in a column direction of the plurality of memory cells in a write operation, and a sub power line configured to transmit a cell driving voltage to the plurality of memory cells in the write operation and to extend in a direction parallel to the bit line, and includes a first node and a second node. The cell driving voltage is applied to the first node of the sub power line and the first node of the sub power line is aligned with an output node of the write driver in a row direction of the plurality of memory cells.
Abstract:
A system on chip includes an SRAM. The SRAM includes at least one memory cell and a peripheral circuit accessing the at least memory cell. A first power circuit is configured to supply a first driving voltage to the at least one memory cell. A second power circuit is configured to supply a second driving voltage to the peripheral circuit. The SRAM further includes an auto power switch that selects the higher of the first driving voltage and the second driving voltage and supplies the selected voltage to the at least one memory cell.
Abstract:
Various embodiments disclose a method and an apparatus including a display, a memory including information on a number of duty cycles per one refresh period for emitting light by pixels of the display corresponding to each of a plurality of refresh rates of the display, and a processor, wherein the processor is configured to control the electronic device to perform an operation according to a first number of duty cycles based on the display operating at a first refresh rate, and perform an operation according to a second number of duty cycles based on the display operating at a second refresh rate, wherein the first number is less than the second number based on the first refresh rate being higher than the second refresh rate.
Abstract:
A display device is provided. The display device includes a display driver circuit, and a display panel including a display area including a plurality of pixels, a non-display area, an empty area enclosed by the plurality of pixels, a first scan driving circuit disposed in a first partial area of the non-display area formed outside of a first side of the display area, at least one first scan line extended towards the empty area from the first scan driving circuit, a second scan driving circuit and disposed in a second partial area of the non-display area formed outside a second side adjacent to the first side of the display area, and at least one second scan line extended towards the empty area from the second scan driving circuit to be connected to at least one second pixel of the plurality of pixels.
Abstract:
A static random access memory device includes a plurality of memory cells arranged in rows and columns, a write driver configured to apply a bit line voltage corresponding to write data to a bit line extending in a column direction of the plurality of memory cells in a write operation, and a sub power line configured to transmit a cell driving voltage to the plurality of memory cells in the write operation and to extend in a direction parallel to the bit line, and includes a first node and a second node. The cell driving voltage is applied to the first node of the sub power line and the first node of the sub power line is aligned with an output node of the write driver in a row direction of the plurality of memory cells.
Abstract:
Various embodiments disclose a method and an apparatus including a display, a memory including information on a number of duty cycles per one refresh period for emitting light by pixels of the display corresponding to each of a plurality of refresh rates of the display, and a processor, wherein the processor is configured to control the electronic device to perform an operation according to a first number of duty cycles based on the display operating at a first refresh rate, and perform an operation according to a second number of duty cycles based on the display operating at a second refresh rate, wherein the first number is less than the second number based on the first refresh rate being higher than the second refresh rate.
Abstract:
Disclosed is an electronic device. An electronic device according to various embodiments may include an optical sensor and a display panel. The display panel may include a first substrate, a second substrate, a pixel layer disposed between the first substrate and the second substrate, the pixel layer having at least one opening in at least a portion thereof, and a light-transmissive member comprising a light-transmissive material disposed in at least a portion of the opening and having a second reflective index corresponding to a first reflective index of the second substrate. The optical sensor may be disposed below the second substrate and at least partially overlap a predetermined area of the display panel corresponding to the opening.
Abstract:
Various embodiments disclose a method and an apparatus including a display, a memory including information on a number of duty cycles per one refresh period for emitting light by pixels of the display corresponding to each of a plurality of refresh rates of the display, and a processor, wherein the processor is configured to control the electronic device to perform an operation according to a first number of duty cycles based on the display operating at a first refresh rate, and perform an operation according to a second number of duty cycles based on the display operating at a second refresh rate, wherein the first number is less than the second number based on the first refresh rate being higher than the second refresh rate.