公开(公告)号：US20240136290A1

公开(公告)日：2024-04-25

申请号：US18323006

申请日：2023-05-23

Applicant: Samsung Electronics Co., Ltd.

Inventor： Jee Woong KIM ,  Jin Kyu KIM ,  Ho Jun KIM ,  Jae Hyun AHN ,  So Ra YOU

IPC: H01L23/528 ,  H01L23/48 ,  H01L29/417 ,  H01L29/78

CPC classification number: H01L23/5286 ,  H01L23/481 ,  H01L29/41725 ,  H01L29/78

Abstract: A semiconductor device having simplicity in design and improved performance and methods for fabricating the same are provided. The semiconductor device includes a substrate including a frontside and a backside opposite the frontside, an electronic device on the frontside of the substrate, an interlayer insulating layer covering the electronic device, a frontside wiring structure on the interlayer insulating layer, a backside wiring structure on the backside of the substrate, and at least one unit chain connecting the electronic device with the backside wiring structure, the unit chain including a through plug passing through the substrate, a connection contact on the interlayer insulating layer, a first chain plug passing through the interlayer insulating layer to connect the through plug with the connection contact, and a second chain plug passing through the interlayer insulating layer to be connected to the through plug.

公开(公告)号：US20230402382A1

公开(公告)日：2023-12-14

申请号：US18113715

申请日：2023-02-24

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Jin Kyu KIM ,  Yun Suk NAM ,  Kyoung Woo LEE ,  Ho-Jun KIM ,  Da Rong OH ,  Sung Moon LEE ,  Hag Ju CHO ,  Seung Min CHA

IPC: H01L23/528 ,  H01L29/06 ,  H01L29/66 ,  H01L29/775 ,  H01L29/786 ,  H01L29/423

CPC classification number: H01L23/5286 ,  H01L29/0673 ,  H01L29/66545 ,  H01L29/775 ,  H01L29/78696 ,  H01L29/66439 ,  H01L29/42392

Abstract: A semiconductor device includes: a base substrate; a first interlayer insulating layer disposed on the base substrate; a power rail disposed inside the first interlayer insulating layer; an active pattern extended in a first horizontal direction and disposed on the first interlayer insulating layer; a gate electrode extended in a second horizontal direction different from the first horizontal direction and disposed on the active pattern; a gate cut extended in the first horizontal direction and disposed on the power rail, wherein the gate cut separates the gate electrode; and a power rail via disposed inside the gate cut, wherein the power rail via is overlapped by the power rail.

公开(公告)号：US20240405104A1

公开(公告)日：2024-12-05

申请号：US18648580

申请日：2024-04-29

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Young Gwon KIM ,  Myung Gil KANG ,  Jin Kyu KIM ,  Dong Won KIM ,  Beom Jin PARK

IPC: H01L29/735 ,  H01L29/08 ,  H01L29/10 ,  H01L29/40 ,  H01L29/417

Abstract: A semiconductor device is provided. The semiconductor includes at least one of a well area in a substrate and having a first conductivity-type; impurity-implanted areas in the well, and having a second conductivity-type different from the first conductivity-type and arranged in a first direction, a first fin structure on the impurity-implanted area and having the second conductivity-type, wherein the first fin structure includes first semiconductor patterns and first sacrificial patterns alternately stacked; a first contact on the first fin structure; a first epitaxial pattern on the well area and having the first conductivity-type; and a second contact on the first epitaxial pattern.

公开(公告)号：US20240234319A9

公开(公告)日：2024-07-11

申请号：US18323006

申请日：2023-05-24

Applicant: Samsung Electronics Co., Ltd.

Inventor： Jee Woong KIM ,  Jin Kyu KIM ,  Ho Jun KIM ,  Jae Hyun AHN ,  So Ra YOU

IPC: H01L23/528 ,  H01L23/48 ,  H01L29/417 ,  H01L29/78

CPC classification number: H01L23/5286 ,  H01L23/481 ,  H01L29/41725 ,  H01L29/78

Abstract: A semiconductor device having simplicity in design and improved performance and methods for fabricating the same are provided. The semiconductor device includes a substrate including a frontside and a backside opposite the frontside, an electronic device on the frontside of the substrate, an interlayer insulating layer covering the electronic device, a frontside wiring structure on the interlayer insulating layer, a backside wiring structure on the backside of the substrate, and at least one unit chain connecting the electronic device with the backside wiring structure, the unit chain including a through plug passing through the substrate, a connection contact on the interlayer insulating layer, a first chain plug passing through the interlayer insulating layer to connect the through plug with the connection contact, and a second chain plug passing through the interlayer insulating layer to be connected to the through plug.

公开(公告)号：US20240203831A1

公开(公告)日：2024-06-20

申请号：US18486416

申请日：2023-10-13

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Anthony Dongick LEE ,  Min Chan GWAK ,  Guk Hee KIM ,  Young Woo KIM ,  Jin Kyu KIM ,  Sang Cheol NA ,  Yun Suk NAM ,  Kyoung Woo LEE ,  Hidenobu FUKUTOME

IPC: H01L23/48 ,  H01L21/768 ,  H01L23/528 ,  H01L25/18 ,  H10B80/00

CPC classification number: H01L23/481 ,  H01L21/76898 ,  H01L23/5286 ,  H01L25/18 ,  H10B80/00 ,  H01L24/13

Abstract: A semiconductor device and a method for manufacturing the same is provided. The semiconductor device includes a power delivery network layer; an insulating layer on the power delivery network layer and having an opening therein; a semiconductor layer filling the opening and covering the insulating layer; a first through-via extending through the semiconductor layer and electrically connected to the power delivery network layer; a second through-via extending through the insulating layer and the semiconductor layer and electrically connected to the power delivery network layer; a logic element on the semiconductor layer and electrically connected to the first through-via; and a passive element on the semiconductor layer and electrically connected to the second through-via.