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    System for fabricating a semiconductor device
    2.
    发明授权
    System for fabricating a semiconductor device 有权

    公开(公告)号：US10892142B2

    公开(公告)日：2021-01-12

    申请号：US16182737

    申请日：2018-11-07

    Applicant: Samsung Electronics Co., Ltd.

    Inventor： Sangjean Jeon ,  Jinyoung Park ,  Chanhoon Park ,  Hoyong Park ,  Jin Young Bang ,  JungHwan Um ,  Il Sup Choi ,  Je-Woo Han

    IPC: H01J37/32 ,  H01L21/683

    Abstract: A system for fabricating a semiconductor device may include a chamber, an electrostatic chuck used to load a substrate, a power source supplying an RF power to the electrostatic chuck, an impedance matcher between the power source and the electrostatic chuck, and a power transmission unit connecting the electrostatic chuck to the impedance matcher. The power transmission unit may include a power rod, which is connected to the electrostatic chuck and has a first outer diameter, and a coaxial cable. The coaxial cable may include an inner wire, an outer wire, and a dielectric material between the outer and inner wires. The inner wire connects the power rod to the impedance matcher and has a second outer diameter less than the first outer diameter. The outer wire is connected to the chamber and is provided to enclose the inner wire and has a first inner diameter less than the first outer diameter and greater than the second outer diameter. A ratio of the first inner diameter to the second outer diameter is greater than a dielectric constant of the dielectric material and less than three times the dielectric constant of the dielectric material.

    Methods for Fabricating Semiconductor Devices Using a Fringe Signal
    6.
    发明申请
    Methods for Fabricating Semiconductor Devices Using a Fringe Signal 审中-公开

    公开(公告)号：US20190043768A1

    公开(公告)日：2019-02-07

    申请号：US15895208

    申请日：2018-02-13

    Applicant: Samsung Electronics Co., Ltd.

    Inventor： Se Jin Oh ,  Yu Sin Kim ,  Jae Woo Kim ,  Jin Young Bang ,  Doug Yong Sung ,  In Yong Hwang

    IPC: H01L21/66 ,  H01L21/027 ,  H01L21/02 ,  H01L21/311 ,  H01L21/768 ,  G03F7/09

    Abstract: Methods for fabricating semiconductor devices are provided including forming a stacked structure including a first mold layer and a second mold layer on a substrate; forming a first photoresist pattern on the stacked structure; etching the second mold layer using the first photoresist pattern as a mask; forming a second photoresist pattern by etching a portion of the first photoresist pattern; measuring a first fringe signal generated by an interference phenomenon between first reflected lights reflected from the first photoresist pattern; forming a stepped structure by etching the second mold layer and the first mold layer which is exposed, using the second photoresist pattern as a mask; measuring a second fringe signal generated by an interference phenomenon between second reflected lights reflected from the second mold layer; calculating a third fringe signal by summing the first fringe signal and the second fringe signal; calculating and a first etch rate of an upper surface of the first photoresist pattern using the third fringe signal; calculating a second etch rate of a side surface of the first photoresist pattern using the first etch rate; and controlling a degree of etching the side surface of the second photoresist pattern using the second etch rate.

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