Abstract:
An integrated circuit device including a substrate; a fin-type active region protruding from the substrate; a gate line intersecting the fin-type active region and covering a top surface and side walls thereof; a gate insulating capping layer covering the gate line; source/drain regions at sides of the gate line on the fin-type active region; first conductive plugs connected to the source/drain regions; a hard mask layer covering the first conductive plugs; and a second conductive plug between the first conductive plugs, the second conductive plug connected to the gate line by passing through the gate insulating capping layer and having a top surface higher than the top surface of each first conductive plug, wherein the hard mask layer protrudes from the first conductive plugs and toward the second conductive plug so that a portion of the hard mask layer overhangs from an edge of the first conductive plugs.
Abstract:
A semiconductor device includes a substrate, a fin active region pattern on the substrate, the fin active region pattern including an upper region and a lower region, a device isolation layer pattern surrounding the fin active region pattern, a gate pattern on the upper region of the fin active region pattern, and a stressor on the lower region of the fin active region pattern, wherein a top surface of the device isolation layer pattern is lower than a top surface of the upper region and higher than a top surface of the lower region.
Abstract:
An auxiliary device including an energy harvester and an electronic device including the auxiliary device are provided. The auxiliary device includes: a housing; a storage module which is moveable within the housing; and at least one piezoelectric transducer which disposed in the housing, such that a motion of the storage module causes a deformation of the piezoelectric transducer, thus generating electric energy. An end of the piezoelectric transducer may be fixedly connected to the storage module.
Abstract:
An integrated circuit device includes a fin-type active region protruding from a top surface of a substrate and extending in a first direction parallel to the top surface of the substrate, a gate structure intersecting with the fin-type active region and extending on the substrate in a second direction perpendicular to the first direction, a source/drain region on a first side of the gate structure, a first contact structure on the source/drain region, and a contact capping layer on the first contact structure. A top surface of the first contact structure has a first width in the first direction, a bottom surface of the contact capping layer has a second width greater than the first width stated above in the first direction, and the contact capping layer includes a protruding portion extending outward from a sidewall of the first contact structure.
Abstract:
A method of managing a control right in a 1:n network topology is provided. The master device includes a display unit configured to display a first screen, a control unit configured to receive a request for at least one right for controlling the master device and/or a mirroring service from at least one of a plurality of client devices mirroring the first screen, and to grant the requested right to the at least one of the plurality of client devices in response to the request, and a communication unit configured to receive the request and to transmit the response.
Abstract:
An apparatus and method for allowing a plurality of playback devices to stream content of a master device simultaneously is provided. When the master device selects one of the playback devices as a reference device and multicasts a synchronization packet to the playback devices, the playback devices determine a synchronization time by comparing their own synchronization packet reception time with a synchronization packet reception time of the reference device. When the master device streams content, into which a time stamp is inserted based on the time of the reference device, the playback devices play the content based on the determined synchronization time. Therefore, even when the playback devices have different network latencies from the master device, the playback devices may accurately perform synchronized content playback.
Abstract:
A method of receiving a packet by a receiving terminal is provided. The method includes receiving one or more packets including information about an event which belongs to a same kind of event from a transmitting terminal, and selecting at least one packet from among the received one or more packets based on time information of a certain point of time at the certain point of time.
Abstract:
An integrated circuit device includes a fin-type active region protruding from a top surface of a substrate and extending in a first direction parallel to the top surface of the substrate, a gate structure intersecting with the fin-type active region and extending on the substrate in a second direction perpendicular to the first direction, a source/drain region on a first side of the gate structure, a first contact structure on the source/drain region, and a contact capping layer on the first contact structure. A top surface of the first contact structure has a first width in the first direction, a bottom surface of the contact capping layer has a second width greater than the first width stated above in the first direction, and the contact capping layer includes a protruding portion extending outward from a sidewall of the first contact structure.
Abstract:
An integrated circuit device including a substrate; a fin-type active region protruding from the substrate; a gate line intersecting the fin-type active region and covering a top surface and side walls thereof; a gate insulating capping layer covering the gate line; source/drain regions at sides of the gate line on the fin-type active region; first conductive plugs connected to the source/drain regions; a hard mask layer covering the first conductive plugs; and a second conductive plug between the first conductive plugs, the second conductive plug connected to the gate line by passing through the gate insulating capping layer and having a top surface higher than the top surface of each first conductive plug, wherein the hard mask layer protrudes from the first conductive plugs and toward the second conductive plug so that a portion of the hard mask layer overhangs from an edge of the first conductive plugs.
Abstract:
A method includes providing a plurality of active regions on a substrate, and at least a first device isolation layer between two of the plurality of active regions, wherein the plurality of active regions extend in a first direction; providing a gate layer extending in a second direction, the gate layer forming a plurality of gate lines including a first gate line and a second gate line extending in a straight line with respect to each other and having a space therebetween, each of the first gate line and second gate line crossing at least one of the active regions, providing an insulation layer covering the first device isolation layer and covering the active region around each of the first and second gate lines; and providing an inter-gate insulation region in the space between the first gate line and the second gate line.