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公开(公告)号:US11637079B2
公开(公告)日:2023-04-25
申请号:US17206252
申请日:2021-03-19
Applicant: Samsung Electronics Co., Ltd.
Inventor: Yongkoon Lee , Jingu Kim , Sangkyu Lee , Seokkyu Choi
IPC: H01L23/66 , H01L23/538 , H01L23/00 , H01L21/683 , H01L21/48 , H01L21/56 , H01Q9/04 , H01Q19/00 , H01L23/31
Abstract: A semiconductor package includes a supporting wiring structure including a first redistribution dielectric layer and a first redistribution conductive structure; a frame on the supporting wiring structure, having a mounting space and a through hole, and including a conductive material; a semiconductor chip in the mounting space and electrically connected to the first redistribution conductive structure; a cover wiring structure on the frame and the semiconductor chip and including a second redistribution dielectric layer and a second redistribution conductive structure; an antenna structure on the cover wiring structure; a connection structure extending in the through hole and electrically connecting the first redistribution conductive structure to the second redistribution conductive structure; and a dielectric filling member between the connection structure in the through hole and the frame and surrounding the semiconductor chip, the frame, and the connection structure.
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公开(公告)号:US11562939B2
公开(公告)日:2023-01-24
申请号:US17235502
申请日:2021-04-20
Applicant: Samsung Electronics Co., Ltd.
Inventor: Jingu Kim , Sangkyu Lee , Yongkoon Lee , Seokkyu Choi
IPC: H01L23/367 , H01L23/31 , H01L23/538 , H01L25/10 , H01L23/00
Abstract: A semiconductor package includes a connection layer, a semiconductor chip disposed at a center portion of the connection layer, an adhesive layer disposed on the semiconductor chip, a heat spreader layer disposed on the adhesive layer, and a lower redistribution layer disposed on the connection layer and a bottom surface of the semiconductor chip. A width of the adhesive layer is the same as a width of the semiconductor chip, and a width of the heat spreader layer is less than the width of the adhesive layer.
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公开(公告)号:US12183694B2
公开(公告)日:2024-12-31
申请号:US18125989
申请日:2023-03-24
Applicant: Samsung Electronics Co., Ltd.
Inventor: Yongkoon Lee , Jingu Kim , Sangkyu Lee , Seokkyu Choi
IPC: H01L23/66 , H01L21/48 , H01L21/56 , H01L21/683 , H01L23/00 , H01L23/31 , H01L23/538 , H01Q9/04 , H01Q19/00
Abstract: A semiconductor package includes a supporting wiring structure including a first redistribution dielectric layer and a first redistribution conductive structure; a frame on the supporting wiring structure, having a mounting space and a through hole, and including a conductive material; a semiconductor chip in the mounting space and electrically connected to the first redistribution conductive structure; a cover wiring structure on the frame and the semiconductor chip and including a second redistribution dielectric layer and a second redistribution conductive structure; an antenna structure on the cover wiring structure; a connection structure extending in the through hole and electrically connecting the first redistribution conductive structure to the second redistribution conductive structure; and a dielectric filling member between the connection structure in the through hole and the frame and surrounding the semiconductor chip, the frame, and the connection structure.
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公开(公告)号:US20240222284A1
公开(公告)日:2024-07-04
申请号:US18228278
申请日:2023-07-31
Applicant: Samsung Electronics Co., Ltd.
Inventor: Bongju Cho , Jingu Kim , Yieok Kwon , Wooyoung Kim , Gongje Lee , Sangkyu Lee
IPC: H01L23/538 , H01L23/00 , H01L23/10
CPC classification number: H01L23/5386 , H01L23/10 , H01L24/05 , H01L24/13 , H01L24/46 , H01L24/73 , H01L2224/02331 , H01L2224/05024 , H01L2224/13008 , H01L2224/46
Abstract: Semiconductor package includes lower redistribution layer providing first redistribution wirings and having first region and second region surrounding the first region, semiconductor chip disposed on the first region and electrically connected to the first redistribution wirings, sealing member covering the semiconductor chip on the lower redistribution layer, plurality of vertical conductive structures penetrating the sealing member on the second region and electrically connected to the first redistribution wirings, upper redistribution layer disposed on the sealing member and having second redistribution wirings electrically connected to the plurality of vertical conductive structures and plurality of bonding pads. The vertical conductive structures are bonded to the bonding pad and extend vertically from the plurality of bonding pads. The vertical conductive structure includes first to third conductive pillar portions sequentially stacked. The first conductive pillar portion has first length and the third conductive pillar portion has third length greater than the first length.
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公开(公告)号:US11569563B2
公开(公告)日:2023-01-31
申请号:US17205055
申请日:2021-03-18
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor: Yongkoon Lee , Jingu Kim , Sangkyu Lee
Abstract: A semiconductor package includes a redistribution wiring layer having redistribution wirings, a semiconductor chip on the redistribution wiring layer, a frame on the redistribution wiring layer, the frame surrounding the semiconductor chip, and the frame having core connection wirings electrically connected to the redistribution wirings, and an antenna structure on the frame, the antenna structure including a ground pattern layer, a first antenna insulation layer, a radiator pattern layer, a second antenna insulation layer, and a director pattern layer sequentially stacked on one another.
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公开(公告)号:US11417613B2
公开(公告)日:2022-08-16
申请号:US17016123
申请日:2020-09-09
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor: Jingu Kim , Shanghoon Seo , Sangkyu Lee , Jeongho Lee
IPC: H01L21/56 , H01L23/00 , H01L23/538 , H01L21/683 , H01L21/48 , H01L23/31
Abstract: A semiconductor package includes: a frame substrate having a plurality of wiring layers and a cavity; an adhesive member disposed at the bottom of the cavity; a semiconductor chip disposed in the cavity, with a connection pad on an upper surface and the lower surface in contact with the adhesive member; a first conductive bump disposed on the connection pad; a second conductive bump disposed on the uppermost of the plurality of wiring layers; an insulating post disposed in the cavity and whose lower surface contacts the adhesive member; an encapsulant filling the cavity and covering side surfaces of the first and second conductive bumps and the insulating post’ and a redistribution structure disposed on the encapsulant, including a redistribution layer electrically connected to the first and second conductive bumps, wherein the insulating post includes a material having a greater hardness than that of the first and second conductive bumps.
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公开(公告)号:US11342274B2
公开(公告)日:2022-05-24
申请号:US16990717
申请日:2020-08-11
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor: Sangkyu Lee , Jingu Kim , Kyungdon Mun , Shanghoon Seo , Jeongho Lee
IPC: H01L23/538 , H01L25/00 , H01L23/00 , H01L23/31 , H01L21/48 , H01L21/56 , H01L21/683 , H01L25/10
Abstract: A semiconductor package is disclosed. The semiconductor package includes a back-side wiring substrate and a front-side redistribution layer which are in parallel, and a connector, a semiconductor chip and an encapsulator which are between the back-side wiring substrate and the front-side redistribution layer. The encapsulator surrounds surfaces of the connector and the semiconductor chip. The back-side wiring substrate includes a core layer, a back-side via plug extending through the core layer, and a back-side redistribution layer on the back-side via plug.
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公开(公告)号:US20250046737A1
公开(公告)日:2025-02-06
申请号:US18925155
申请日:2024-10-24
Applicant: Samsung Electronics Co., Ltd.
Inventor: Yongkoon Lee , Jingu Kim , Sangkyu Lee , Seokkyu Choi
IPC: H01L23/66 , H01L21/48 , H01L21/56 , H01L21/683 , H01L23/00 , H01L23/31 , H01L23/538 , H01Q9/04 , H01Q19/00
Abstract: A semiconductor package includes a supporting wiring structure including a first redistribution dielectric layer and a first redistribution conductive structure; a frame on the supporting wiring structure, having a mounting space and a through hole, and including a conductive material; a semiconductor chip in the mounting space and electrically connected to the first redistribution conductive structure; a cover wiring structure on the frame and the semiconductor chip and including a second redistribution dielectric layer and a second redistribution conductive structure; an antenna structure on the cover wiring structure; a connection structure extending in the through hole and electrically connecting the first redistribution conductive structure to the second redistribution conductive structure; and a dielectric filling member between the connection structure in the through hole and the frame and surrounding the semiconductor chip, the frame, and the connection structure.
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公开(公告)号:US20240347409A1
公开(公告)日:2024-10-17
申请号:US18747798
申请日:2024-06-19
Applicant: Samsung Electronics Co., Ltd.
Inventor: Jingu Kim , Sangkyu Lee , Yongkoon Lee , Seokkyu Choi
IPC: H01L23/367 , H01L23/00 , H01L23/31 , H01L23/538 , H01L25/10
CPC classification number: H01L23/367 , H01L23/3128 , H01L23/5383 , H01L23/5386 , H01L23/5389 , H01L24/20 , H01L25/105 , H01L2224/214 , H01L2225/1035 , H01L2225/1052 , H01L2225/1058 , H01L2225/1094
Abstract: A semiconductor package includes a connection layer, a semiconductor chip disposed at a center portion of the connection layer, an adhesive layer disposed on the semiconductor chip, a heat spreader layer disposed on the adhesive layer, and a lower redistribution layer disposed on the connection layer and a bottom surface of the semiconductor chip. A width of the adhesive layer is the same as a width of the semiconductor chip, and a width of the heat spreader layer is less than the width of the adhesive layer.
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公开(公告)号:US20240006342A1
公开(公告)日:2024-01-04
申请号:US18119327
申请日:2023-03-09
Applicant: Samsung Electronics Co., Ltd.
Inventor: Jingu Kim , Yieok Kwon , Sangkyu Lee , Taesung Jeong
IPC: H01L23/00 , H01L23/31 , H01L23/498 , H01L23/29
CPC classification number: H01L23/562 , H01L23/3128 , H01L23/49822 , H01L23/49811 , H01L23/49894 , H01L23/295 , H01L24/16 , H01L2224/16227 , H10B80/00
Abstract: A semiconductor package includes a first redistribution structure including a first redistribution layer; a semiconductor chip on a first surface of the first redistribution structure and including a connection pad electrically connected to the first redistribution layer; an encapsulant that surrounds at least a portion of the semiconductor chip; a second redistribution structure on the encapsulant and including a second redistribution layer; a through-via structure that extends through the encapsulant and electrically connects the first redistribution layer to the second redistribution layer; an organic material layer between the through-via structure and the encapsulant and having an elongation rate greater than an elongation rate of the encapsulant; and a bump structure on a second surface of the first redistribution structure.
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