公开(公告)号：US09023716B2

公开(公告)日：2015-05-05

申请号：US14147718

申请日：2014-01-06

Applicant: Samsung Electronics Co., Ltd.

Inventor： Chungsun Lee ,  Jung-Seok Ahn ,  Kwang-chul Choi ,  Un-Byoung Kang ,  Jung-Hwan Kim ,  Joonsik Sohn ,  Jeon Il Lee

IPC: H01L21/58 ,  H01L21/304 ,  H01L21/683

CPC classification number: H01L21/6835 ,  B32B37/1284 ,  B32B37/18 ,  B32B37/24 ,  B32B37/26 ,  B32B38/04 ,  B32B38/10 ,  B32B38/162 ,  B32B2037/268 ,  B32B2315/08 ,  B32B2457/14 ,  H01L21/02057 ,  H01L21/02126 ,  H01L21/304 ,  H01L21/6836 ,  H01L21/76898 ,  H01L24/03 ,  H01L24/14 ,  H01L2221/68318 ,  H01L2221/68327 ,  H01L2221/6834 ,  H01L2221/68363 ,  H01L2221/68372 ,  H01L2221/68381 ,  H01L2224/0401 ,  H01L2224/05025 ,  H01L2224/13023 ,  H01L2924/12042 ,  H01L2924/181 ,  Y10S438/977 ,  H01L2924/00

Abstract: A method for processing substrates includes providing a bonding layer between a substrate and a carrier to bond the substrate to the carrier, processing the substrate while the substrate is supported by the carrier, and removing the bonding layer to separate the substrate from the carrier. The bonding layer may include a thermosetting release layer and thermosetting glue layers, wherein at least one of the thermosetting glue layers is provided on each side of the thermosetting release layer.

Abstract translation: 一种处理衬底的方法包括：在衬底和载体之间提供接合层，以将衬底粘合到载体上，在衬底由载体支撑的同时处理衬底，以及去除结合层以使衬底与载体分离。 粘合层可以包括热固性剥离层和热固性胶层，其中至少一个热固性胶层设置在热固性剥离层的每一侧上。

公开(公告)号：US09412636B2

公开(公告)日：2016-08-09

申请号：US14682231

申请日：2015-04-09

Applicant: Samsung Electronics Co., Ltd

Inventor： Chungsun Lee ,  Jung-Seok Ahn ,  Kwang-chul Choi ,  Un-Byoung Kang ,  Jung-Hwan Kim ,  Joonsik Sohn ,  Jeon Il Lee

IPC: H01L21/58 ,  H01L21/683 ,  H01L21/304 ,  B32B37/12 ,  B32B37/18 ,  B32B37/24 ,  B32B37/26 ,  B32B38/04 ,  B32B38/10 ,  B32B38/16 ,  H01L21/02 ,  H01L21/768 ,  H01L23/00

CPC classification number: H01L21/6835 ,  B32B37/1284 ,  B32B37/18 ,  B32B37/24 ,  B32B37/26 ,  B32B38/04 ,  B32B38/10 ,  B32B38/162 ,  B32B2037/268 ,  B32B2315/08 ,  B32B2457/14 ,  H01L21/02057 ,  H01L21/02126 ,  H01L21/304 ,  H01L21/6836 ,  H01L21/76898 ,  H01L24/03 ,  H01L24/14 ,  H01L2221/68318 ,  H01L2221/68327 ,  H01L2221/6834 ,  H01L2221/68363 ,  H01L2221/68372 ,  H01L2221/68381 ,  H01L2224/0401 ,  H01L2224/05025 ,  H01L2224/13023 ,  H01L2924/12042 ,  H01L2924/181 ,  Y10S438/977 ,  H01L2924/00

Abstract: A method for processing substrates includes providing a bonding layer between a substrate and a carrier to bond the substrate to the carrier, processing the substrate while the substrate is supported by the carrier, and removing the bonding layer to separate the substrate from the carrier. The bonding layer may include a thermosetting release layer and thermosetting glue layers, wherein at least one of the thermosetting glue layers is provided on each side of the thermosetting release layer.

公开(公告)号：US20240014087A1

公开(公告)日：2024-01-11

申请号：US18113163

申请日：2023-02-23

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： In Sup SHIN ,  Jung-Seok Ahn ,  Hyeong Mun Kang ,  Seung Woo Sim

IPC: H01L23/31 ,  H01L25/065 ,  H01L23/13 ,  H01L23/498 ,  H01L23/00 ,  H01L21/683 ,  H01L21/56

CPC classification number: H01L23/3135 ,  H01L25/0657 ,  H01L23/13 ,  H01L23/3178 ,  H01L23/49827 ,  H01L24/08 ,  H01L24/16 ,  H01L24/32 ,  H01L24/73 ,  H01L21/6836 ,  H01L21/561 ,  H01L2225/06541 ,  H01L2225/06513 ,  H01L2924/182 ,  H01L2224/08113 ,  H01L2224/16148 ,  H01L2224/32058 ,  H01L2224/32059 ,  H01L2224/32145 ,  H01L2224/73204 ,  H01L2221/68327 ,  H10B80/00

Abstract: A semiconductor package includes: a substrate including a first region and a second region at least partially surrounding the first region in a plane defined by first and second horizontal directions, wherein the substrate has a first surface and a second surface opposed to the first surface; a wiring pattern disposed on the first surface of the substrate; a first recess formed on the second surface of the substrate and in the second region of the substrate; a back side insulating layer disposed on the second surface of the substrate, wherein the back side insulating layer fills an inside of the first recess; a through via penetrating through the first region of the substrate and the back side insulating layer, wherein the through via connects to the wiring pattern; and a second recess formed in the back side insulating layer and on the first recess.