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公开(公告)号:US12080710B2
公开(公告)日:2024-09-03
申请号:US17361418
申请日:2021-06-29
Applicant: Samsung Electronics Co., Ltd.
Inventor: Kyooho Jung , Young-Lim Park , Changmu An , Hongseon Song , Yukyung Shin
CPC classification number: H01L27/0805 , H01L28/60
Abstract: Disclosed are semiconductor devices and fabrication methods for the same. The semiconductor devices may include a bottom electrode, a dielectric layer, and a top electrode that are sequentially stacked on a semiconductor substrate. The bottom electrode includes a first doping region in contact with the dielectric layer, a main region spaced apart from the dielectric layer by the first doping region intervening therebetween, and a second doping region between the first doping region and the main region. Each of the first and second doping regions includes oxygen and a doping metal. In some embodiments, the second doping region may include nitrogen. The main region may be devoid of the doping metal. An amount of oxygen in the second doping region is less than an amount of oxygen in the first doping region.
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公开(公告)号:US11728160B2
公开(公告)日:2023-08-15
申请号:US17376403
申请日:2021-07-15
Applicant: Samsung Electronics Co., Ltd.
Inventor: Younsoo Kim , Haeryong Kim , Seungmin Ryu , Sunmin Moon , Jeonggyu Song , Changsu Woo , Kyooho Jung , Younjoung Cho
IPC: H01L21/02
CPC classification number: H01L21/02164 , H01L21/0228
Abstract: A method of forming an oxide film including two non-oxygen elements includes providing a first source material on a substrate, the first source material including a first central element, providing an electron donor compound to be bonded to the first source material, providing a second source material on the substrate after the providing of the electron donor compound, the second source material including a second central element, and providing an oxidant on the substrate.
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公开(公告)号:US11665884B2
公开(公告)日:2023-05-30
申请号:US17172131
申请日:2021-02-10
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor: Chang-Su Woo , Haeryong Kim , Younsoo Kim , Sunmin Moon , Jeonggyu Song , Kyooho Jung
IPC: H01L21/768 , H01L23/522 , H01L27/108
CPC classification number: H10B12/315 , H10B12/033 , H10B12/34
Abstract: A semiconductor device includes conductive pillars on a semiconductor substrate, a first support pattern that contacts first portions of lateral surfaces of the conductive pillars and connects the conductive pillars to each other, the first support pattern including first support holes that expose second portions of the lateral surfaces of the conductive pillars, a capping conductive pattern that contacts the second portions of the lateral surfaces of the conductive pillars and exposes the first support pattern, the second portions of the lateral surfaces of the conductive pillars being in no contact with the first support pattern, and a dielectric layer that covers the first support pattern and the capping conductive pattern, the dielectric layer being spaced apart from the conductive pillars.
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公开(公告)号:US11600621B2
公开(公告)日:2023-03-07
申请号:US17412801
申请日:2021-08-26
Applicant: Samsung Electronics Co., Ltd.
Inventor: Kyooho Jung , Younsoo Kim , Young-lim Park , Jeong-Gyu Song , Se Hyoung Ahn , Changmu An
IPC: H01L27/108 , H01L49/02 , H01L21/02
Abstract: Disclosed are semiconductor memory devices and methods of fabricating the same. The semiconductor memory device comprises a capacitor that includes a bottom electrode, a top electrode opposite to the bottom electrode across a dielectric layer, and an interface layer between the bottom electrode and the dielectric layer. The interface layer includes a combination of niobium (Nb), titanium (Ti), oxygen (O), and nitrogen (N), and further includes a constituent of the dielectric layer.
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公开(公告)号:US20220115380A1
公开(公告)日:2022-04-14
申请号:US17558687
申请日:2021-12-22
Applicant: Samsung Electronics Co., Ltd.
Inventor: Kyooho Jung , Jeong-Gyu Song , Younsoo Kim , Jooho Lee
IPC: H01L27/108 , H01L49/02
Abstract: Disclosed are semiconductor memory devices and methods of fabricating the same. The semiconductor memory devices may include a capacitor including first and second electrodes and a dielectric layer. The dielectric layer may include a zirconium aluminum oxide layer including a first zirconium region adjacent to the first electrode, a first aluminum region, a second aluminum region adjacent to the second electrode, and a second zirconium region between the first and second aluminum regions. The first and second zirconium regions may include zirconium and oxygen and may be devoid of aluminum. The first and second aluminum regions may include aluminum and oxygen and may be devoid of zirconium. The first aluminum region and the first zirconium region may be spaced apart by a first distance, and the first aluminum region and the second zirconium region may be spaced apart by a second distance shorter than the first distance.
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公开(公告)号:US11133314B2
公开(公告)日:2021-09-28
申请号:US16897589
申请日:2020-06-10
Applicant: Samsung Electronics Co., Ltd.
Inventor: Kyooho Jung , Younsoo Kim , Young-lim Park , Jeong-Gyu Song , Se Hyoung Ahn , Changmu An
IPC: H01L27/108 , H01L49/02 , H01L21/02
Abstract: Disclosed are semiconductor memory devices and methods of fabricating the same. The semiconductor memory device comprises a capacitor that includes a bottom electrode, a top electrode opposite to the bottom electrode across a dielectric layer, and an interface layer between the bottom electrode and the dielectric layer. The interface layer includes a combination of niobium (Nb), titanium (Ti), oxygen (O), and nitrogen (N), and further includes a constituent of the dielectric layer.
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公开(公告)号:US11810946B2
公开(公告)日:2023-11-07
申请号:US17749702
申请日:2022-05-20
Applicant: Samsung Electronics Co., Ltd.
Inventor: Jeonggyu Song , Kyooho Jung , Younsoo Kim , Haeryong Kim , Jooho Lee
IPC: H10B12/00 , H01L21/285 , H01L49/02
CPC classification number: H01L28/60 , H01L21/28556 , H10B12/30
Abstract: A capacitor includes: a lower electrode including a metal nitride represented by MM′N, wherein M is a metal element, M′ is an element different from M, and N is nitrogen; a dielectric layer on the lower electrode; an interfacial layer between the lower electrode and the dielectric layer and including a metal nitrate represented by MM′ON, wherein M is a metal element, M′ is an element different from M, N is nitrogen, and O is oxygen; and an upper electrode on the dielectric layer.
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公开(公告)号:US11778805B2
公开(公告)日:2023-10-03
申请号:US17592555
申请日:2022-02-04
Applicant: Samsung Electronics Co., Ltd.
Inventor: Kyooho Jung , Jeong-Gyu Song , Younsoo Kim , Jooho Lee
CPC classification number: H10B12/033 , H01L21/02178 , H01L21/02181 , H01L21/02186 , H01L21/02189 , H01L28/75 , H01L28/91 , H10B12/315
Abstract: Disclosed are semiconductor memory devices and methods of fabricating the same. The semiconductor memory devices may include a capacitor including first and second electrodes and a dielectric layer. The dielectric layer may include a zirconium aluminum oxide layer including a first zirconium region adjacent to the first electrode, a first aluminum region, a second aluminum region adjacent to the second electrode, and a second zirconium region between the first and second aluminum regions. The first and second zirconium regions may include zirconium and oxygen and may be devoid of aluminum. The first and second aluminum regions may include aluminum and oxygen and may be devoid of zirconium. The first aluminum region and the first zirconium region may be spaced apart by a first distance, and the first aluminum region and the second zirconium region may be spaced apart by a second distance shorter than the first distance.
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公开(公告)号:US11716840B2
公开(公告)日:2023-08-01
申请号:US17571935
申请日:2022-01-10
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor: Kyooho Jung , Yukyung Shin , Jinho Lee
IPC: H10B12/00
CPC classification number: H10B12/315 , H10B12/033 , H10B12/34
Abstract: A semiconductor device including a substrate; bottom electrodes on the substrate, each bottom electrode including a first region and a second region, the second region containing an additional element relative to the first region; a first supporting pattern on the substrate and in contact with a portion of a side surface of each bottom electrode; a top electrode on the bottom electrodes; a dielectric layer between the bottom electrodes and the top electrode; and a capping layer between the bottom electrodes and the dielectric layer, the capping layer covering a top surface and a bottom surface of the first supporting pattern, wherein the second region is in contact with the capping layer, and the capping layer and the dielectric layer include different materials from each other.
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公开(公告)号:US20230005925A1
公开(公告)日:2023-01-05
申请号:US17702190
申请日:2022-03-23
Applicant: Samsung Electronics Co., Ltd.
Inventor: Kyooho Jung , Dongkwan Baek , Cheoljin Cho
IPC: H01L27/108
Abstract: A capacitor may include a lower electrode, a dielectric layer structure on the lower electrode, and an upper electrode on the dielectric layer structure. The dielectric layer structure may include a plurality of dielectric layers and at least one insert layer structure between ones of the plurality of dielectric layers. The insert layer structure may include a plurality of zirconium oxide layers and at least one insert layer. The insert layer may be between ones of the plurality of zirconium oxide layers. The capacitor may have a high capacitance and low leakage currents.
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