Semiconductor devices and methods of fabricating the same

    公开(公告)号:US12080710B2

    公开(公告)日:2024-09-03

    申请号:US17361418

    申请日:2021-06-29

    CPC classification number: H01L27/0805 H01L28/60

    Abstract: Disclosed are semiconductor devices and fabrication methods for the same. The semiconductor devices may include a bottom electrode, a dielectric layer, and a top electrode that are sequentially stacked on a semiconductor substrate. The bottom electrode includes a first doping region in contact with the dielectric layer, a main region spaced apart from the dielectric layer by the first doping region intervening therebetween, and a second doping region between the first doping region and the main region. Each of the first and second doping regions includes oxygen and a doping metal. In some embodiments, the second doping region may include nitrogen. The main region may be devoid of the doping metal. An amount of oxygen in the second doping region is less than an amount of oxygen in the first doping region.

    SEMICONDUCTOR MEMORY DEVICES AND METHODS OF FABRICATING THE SAME

    公开(公告)号:US20220115380A1

    公开(公告)日:2022-04-14

    申请号:US17558687

    申请日:2021-12-22

    Abstract: Disclosed are semiconductor memory devices and methods of fabricating the same. The semiconductor memory devices may include a capacitor including first and second electrodes and a dielectric layer. The dielectric layer may include a zirconium aluminum oxide layer including a first zirconium region adjacent to the first electrode, a first aluminum region, a second aluminum region adjacent to the second electrode, and a second zirconium region between the first and second aluminum regions. The first and second zirconium regions may include zirconium and oxygen and may be devoid of aluminum. The first and second aluminum regions may include aluminum and oxygen and may be devoid of zirconium. The first aluminum region and the first zirconium region may be spaced apart by a first distance, and the first aluminum region and the second zirconium region may be spaced apart by a second distance shorter than the first distance.

    Semiconductor memory devices and methods of fabricating the same

    公开(公告)号:US11778805B2

    公开(公告)日:2023-10-03

    申请号:US17592555

    申请日:2022-02-04

    Abstract: Disclosed are semiconductor memory devices and methods of fabricating the same. The semiconductor memory devices may include a capacitor including first and second electrodes and a dielectric layer. The dielectric layer may include a zirconium aluminum oxide layer including a first zirconium region adjacent to the first electrode, a first aluminum region, a second aluminum region adjacent to the second electrode, and a second zirconium region between the first and second aluminum regions. The first and second zirconium regions may include zirconium and oxygen and may be devoid of aluminum. The first and second aluminum regions may include aluminum and oxygen and may be devoid of zirconium. The first aluminum region and the first zirconium region may be spaced apart by a first distance, and the first aluminum region and the second zirconium region may be spaced apart by a second distance shorter than the first distance.

    Semiconductor memory device including capacitor

    公开(公告)号:US11716840B2

    公开(公告)日:2023-08-01

    申请号:US17571935

    申请日:2022-01-10

    CPC classification number: H10B12/315 H10B12/033 H10B12/34

    Abstract: A semiconductor device including a substrate; bottom electrodes on the substrate, each bottom electrode including a first region and a second region, the second region containing an additional element relative to the first region; a first supporting pattern on the substrate and in contact with a portion of a side surface of each bottom electrode; a top electrode on the bottom electrodes; a dielectric layer between the bottom electrodes and the top electrode; and a capping layer between the bottom electrodes and the dielectric layer, the capping layer covering a top surface and a bottom surface of the first supporting pattern, wherein the second region is in contact with the capping layer, and the capping layer and the dielectric layer include different materials from each other.

    CAPACITOR AND A DRAM DEVICE INCLUDING THE SAME

    公开(公告)号:US20230005925A1

    公开(公告)日:2023-01-05

    申请号:US17702190

    申请日:2022-03-23

    Abstract: A capacitor may include a lower electrode, a dielectric layer structure on the lower electrode, and an upper electrode on the dielectric layer structure. The dielectric layer structure may include a plurality of dielectric layers and at least one insert layer structure between ones of the plurality of dielectric layers. The insert layer structure may include a plurality of zirconium oxide layers and at least one insert layer. The insert layer may be between ones of the plurality of zirconium oxide layers. The capacitor may have a high capacitance and low leakage currents.

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