公开(公告)号：US20210159340A1

公开(公告)日：2021-05-27

申请号：US17144444

申请日：2021-01-08

Applicant: Samsung Electronics Co., Ltd.

Inventor： Woobin SONG ,  Heiseung KIM ,  Mirco CANTORO ,  Sangwoo LEE ,  Minhee CHO ,  Beomyong HWANG

IPC: H01L29/78 ,  H01L29/51 ,  H01L29/66 ,  H01L29/161

Abstract: A ferroelectric semiconductor device includes an active region extending in one direction, a gate insulating layer crossing the active region, a ferroelectric layer disposed on the gate insulating layer and including a hafnium oxide, a gate electrode layer disposed on the ferroelectric layer, and source/drain regions disposed on the active region to be adjacent to both sides of the gate insulating layer, wherein the ferroelectric layer includes 20% or more of orthorhombic crystals, and an upper surface of the source/drain region is located at a level equal to or higher than an upper surface of the ferroelectric layer.

公开(公告)号：US20180151561A1

公开(公告)日：2018-05-31

申请号：US15489093

申请日：2017-04-17

Applicant: Samsung Electronics Co., Ltd.

Inventor： Mirco CANTORO ,  Yeon Cheol HEO ,  Byoung Gi KIM ,  Chang Min YOE ,  Seung Chan YUN ,  Dong Hun LEE ,  Yun Il LEE ,  Hyung Suk LEE

IPC: H01L27/088 ,  H01L29/06 ,  H01L23/50 ,  H01L21/8234

CPC classification number: H01L27/088 ,  B82Y10/00 ,  H01L21/823412 ,  H01L21/823456 ,  H01L21/823487 ,  H01L23/50 ,  H01L29/0676 ,  H01L29/401 ,  H01L29/42392 ,  H01L29/66439 ,  H01L29/66469 ,  H01L29/775 ,  H01L29/78642 ,  H01L29/78696 ,  H01L2029/42388

Abstract: A semiconductor device includes a substrate having a first region and a second region; a first nanowire in the first region in a direction perpendicular to an upper surface of the substrate; a second nanowire in the second region in a direction perpendicular to the upper surface of the substrate and having a height less than that of the first nanowire; first source/drain regions at top portion and bottom portion of the first nanowire; second source/drain regions at top portion and bottom portion of the second nanowire; a first gate electrode surrounding the first nanowire between the first source/drain regions; and a second gate electrode surrounding the second nanowire between the second source/drain regions.

公开(公告)号：US20240387527A1

公开(公告)日：2024-11-21

申请号：US18786756

申请日：2024-07-29

Applicant: Samsung Electronics Co., Ltd.

Inventor： Ho-Jun KIM ,  Beomjin PARK ,  Dong Il BAE ,  Mirco CANTORO

IPC: H01L27/088 ,  H01L29/417 ,  H01L29/423

Abstract: Disclosed are semiconductor devices and methods of fabricating the same. The semiconductor device includes a plurality of gate structures that are spaced apart from each other in a first direction on a substrate and extend in a second direction intersecting the first direction, and a plurality of separation patterns penetrating immediately neighboring ones of the plurality of gate structures, respectively. Each of the plurality of separation patterns separates a corresponding one of the neighboring gate structures into a pair of gate structures that are spaced apart from each other in the second direction. The plurality of separation patterns are spaced apart from and aligned with each other along the first direction.

公开(公告)号：US20240204047A1

公开(公告)日：2024-06-20

申请号：US18594124

申请日：2024-03-04

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Ho-Jun Kim ,  Woong Sik NAM ,  Mirco CANTORO

IPC: H01L29/06 ,  H01L21/8234 ,  H01L29/423 ,  H01L29/66

CPC classification number: H01L29/0673 ,  H01L21/823481 ,  H01L29/4236 ,  H01L29/6656

Abstract: A semiconductor device includes first and second active patterns, a field insulating film between the first and second active patterns, a first gate structure intersecting the first active pattern and including a first gate electrode and a first gate spacer, a second gate structure intersecting the second active pattern and including a second gate electrode and a second gate spacer, a gate separation structure on the field insulating film between the first and second gate structures, the gate separation structure including a gate separation filling film on a gate separation liner, and a connecting spacer between the gate separation structure and the field insulating film, the connecting spacer protruding from a top surface of the field insulating film, and the gate separation liner contacting the connecting spacer and extending along a top surface and sidewalls of the connecting spacer and along the top surface of the field insulating film.

公开(公告)号：US20220352375A1

公开(公告)日：2022-11-03

申请号：US17860820

申请日：2022-07-08

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Mirco CANTORO ,  Yeoncheol HEO

IPC: H01L29/78 ,  H01L29/06 ,  H01L27/088 ,  H01L29/417 ,  H01L29/10 ,  H01L29/66 ,  H01L21/8238 ,  H01L21/8234

Abstract: The present disclosure relates to a field-effect transistor and a method of fabricating the same. A field-effect transistor includes a semiconductor substrate including a first semiconductor material having a first lattice constant, and a fin structure on the semiconductor substrate. The fin structure includes a second semiconductor material having a second lattice constant that is different from the first lattice constant. The fin structure further includes a lower portion that is elongated in a first direction, a plurality of upper portions protruding from the lower portion and elongated in a second direction that is different from the first direction, and a gate structure crossing the plurality of upper portions.

公开(公告)号：US20220130957A1

公开(公告)日：2022-04-28

申请号：US17333080

申请日：2021-05-28

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Ho-Jun KIM ,  Woong Sik NAM ,  Mirco CANTORO

IPC: H01L29/06 ,  H01L29/66 ,  H01L29/423

Abstract: A semiconductor device includes first and second active patterns, a field insulating film between the first and second active patterns, a first gate structure intersecting the first active pattern and including a first gate electrode and a first gate spacer, a second gate structure intersecting the second active pattern and including a second gate electrode and a second gate spacer, a gate separation structure on the field insulating film between the first and second gate structures, the gate separation structure including a gate separation filling film on a gate separation liner, and a connecting spacer between the gate separation structure and the field insulating film, the connecting spacer protruding from a top surface of the field insulating film, and the gate separation liner contacting the connecting spacer and extending along a top surface and sidewalls of the connecting spacer and along the top surface of the field insulating film.

公开(公告)号：US20230163171A1

公开(公告)日：2023-05-25

申请号：US18102204

申请日：2023-01-27

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Ho-Jun KIM ,  Woong Sik NAM ,  Mirco CANTORO

IPC: H01L29/06 ,  H01L29/423 ,  H01L29/66 ,  H01L21/8234

CPC classification number: H01L29/0673 ,  H01L29/4236 ,  H01L29/6656 ,  H01L21/823481

Abstract: A semiconductor device includes first and second active patterns, a field insulating film between the first and second active patterns, a first gate structure intersecting the first active pattern and including a first gate electrode and a first gate spacer, a second gate structure intersecting the second active pattern and including a second gate electrode and a second gate spacer, a gate separation structure on the field insulating film between the first and second gate structures, the gate separation structure including a gate separation filling film on a gate separation liner, and a connecting spacer between the gate separation structure and the field insulating film, the connecting spacer protruding from a top surface of the field insulating film, and the gate separation liner contacting the connecting spacer and extending along a top surface and sidewalls of the connecting spacer and along the top surface of the field insulating film.

公开(公告)号：US20200343382A1

公开(公告)日：2020-10-29

申请号：US16923389

申请日：2020-07-08

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Mirco CANTORO ,  Yeoncheol HEO

IPC: H01L29/78 ,  H01L29/06 ,  H01L27/088 ,  H01L29/417 ,  H01L29/10 ,  H01L29/66 ,  H01L21/8238 ,  H01L21/8234

Abstract: The present disclosure relates to a field-effect transistor and a method of fabricating the same. A field-effect transistor includes a semiconductor substrate including a first semiconductor material having a first lattice constant, and a fin structure on the semiconductor substrate. The fin structure includes a second semiconductor material having a second lattice constant that is different from the first lattice constant. The fin structure further includes a lower portion that is elongated in a first direction, a plurality of upper portions protruding from the lower portion and elongated in a second direction that is different from the first direction, and a gate structure crossing the plurality of upper portions.

公开(公告)号：US20180040740A1

公开(公告)日：2018-02-08

申请号：US15598675

申请日：2017-05-18

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Mirco CANTORO ,  Yeon-cheol HEO ,  Maria Toledano LUQUE

IPC: H01L29/786 ,  H01L29/423 ,  H01L21/8238 ,  H01L27/092

CPC classification number: H01L29/78696 ,  H01L21/823807 ,  H01L21/823814 ,  H01L21/823828 ,  H01L21/823878 ,  H01L21/823885 ,  H01L27/092 ,  H01L29/42392 ,  H01L29/78609 ,  H01L29/78618 ,  H01L29/78642

Abstract: An integrated circuit device includes a substrate, first and second fin active regions formed on the substrate and extending in a first direction parallel to a top surface of the substrate, a first gate structure disposed on a side surface of the first fin active region, a pair of first impurity regions respectively formed on a top portion and a bottom portion of the first fin active region, a second gate structure disposed on a side surface of the second fin active region, and a pair of second impurity regions respectively formed on a top portion or a bottom portion of the second fin active region, wherein the pair of first impurity regions vertically overlap each other, and the pair of second impurity regions do not vertically overlap each other.

公开(公告)号：US20220262790A1

公开(公告)日：2022-08-18

申请号：US17466043

申请日：2021-09-03

Applicant: Samsung Electronics Co., Ltd.

Inventor： Ho-Jun KIM ,  Beomjin PARK ,  Dong Il BAE ,  Mirco CANTORO

IPC: H01L27/088 ,  H01L29/417 ,  H01L29/423

Abstract: Disclosed are semiconductor devices and methods of fabricating the same. The semiconductor device includes a plurality of gate structures that are spaced apart from each other in a first direction on a substrate and extend in a second direction intersecting the first direction, and a plurality of separation patterns penetrating immediately neighboring ones of the plurality of gate structures, respectively. Each of the plurality of separation patterns separates a corresponding one of the neighboring gate structures into a pair of gate structures that are spaced apart from each other in the second direction. The plurality of separation patterns are spaced apart from and aligned with each other along the first direction.