公开(公告)号：US20190312124A1

公开(公告)日：2019-10-10

申请号：US16249298

申请日：2019-01-16

申请人： Samsung Electronics Co., Ltd.

发明人： Yun Il LEE ,  Sung II PARK ,  Jae Hyun PARK ,  Hyung Suk LEE

IPC分类号： H01L29/66 ,  H01L27/092 ,  H01L29/06 ,  H01L29/08 ,  H01L29/78 ,  H01L21/02 ,  H01L21/8238

摘要： A semiconductor device including a first fin type pattern and a second fin type pattern which protrude from a substrate and are spaced apart from each other to extend in a first direction, a dummy fin type pattern protruding from the substrate between the first fin type pattern and the second fin type pattern, a first gate structure extending in a second direction intersecting with the first direction, on the first fin type pattern, a second gate structure extending in the second direction, on the second fin type pattern, and a capping pattern extending in the second direction, on the first gate structure and the second gate structure, wherein the capping pattern includes a separation part which is in contact with an upper surface of the dummy fin type pattern, and the dummy fin type pattern and the separation part separate the first gate structure and the second gate structure.

公开(公告)号：US20230122379A1

公开(公告)日：2023-04-20

申请号：US17879134

申请日：2022-08-02

申请人： SAMSUNG ELECTRONICS CO., LTD.

发明人： Shin Cheol MIN ,  Keon Yong CHEON ,  Myung Dong KO ,  Yong Hee PARK ,  Sang Hyeon LEE ,  Dong Won KIM ,  Woo Seung SHIN ,  Hyung Suk LEE

IPC分类号： H01L29/417 ,  H01L29/06 ,  H01L29/08 ,  H01L29/423 ,  H01L29/786 ,  H01L29/775 ,  H01L29/66

摘要： A semiconductor device includes an active pattern with a lower pattern and sheet patterns spaced apart from the lower pattern, a gate structure on the lower pattern and having a gate electrode and a gate insulating film that surround each of the sheet patterns, a gate capping pattern on the gate structure, a gate etching stop pattern between the gate capping pattern and the gate structure, a gate spacer along a sidewall of the gate capping pattern, a source/drain pattern on the gate structure, a gate contact through the gate capping pattern and connected to the gate electrode, upper surfaces of the gate contact and gate spacer being coplanar, and a source/drain contact on the source/drain pattern and connected to the source/drain pattern.

公开(公告)号：US20180151561A1

公开(公告)日：2018-05-31

申请号：US15489093

申请日：2017-04-17

申请人： Samsung Electronics Co., Ltd.

发明人： Mirco CANTORO ,  Yeon Cheol HEO ,  Byoung Gi KIM ,  Chang Min YOE ,  Seung Chan YUN ,  Dong Hun LEE ,  Yun Il LEE ,  Hyung Suk LEE

IPC分类号： H01L27/088 ,  H01L29/06 ,  H01L23/50 ,  H01L21/8234

CPC分类号： H01L27/088 ,  B82Y10/00 ,  H01L21/823412 ,  H01L21/823456 ,  H01L21/823487 ,  H01L23/50 ,  H01L29/0676 ,  H01L29/401 ,  H01L29/42392 ,  H01L29/66439 ,  H01L29/66469 ,  H01L29/775 ,  H01L29/78642 ,  H01L29/78696 ,  H01L2029/42388

摘要： A semiconductor device includes a substrate having a first region and a second region; a first nanowire in the first region in a direction perpendicular to an upper surface of the substrate; a second nanowire in the second region in a direction perpendicular to the upper surface of the substrate and having a height less than that of the first nanowire; first source/drain regions at top portion and bottom portion of the first nanowire; second source/drain regions at top portion and bottom portion of the second nanowire; a first gate electrode surrounding the first nanowire between the first source/drain regions; and a second gate electrode surrounding the second nanowire between the second source/drain regions.

公开(公告)号：US20230019860A1

公开(公告)日：2023-01-19

申请号：US17718703

申请日：2022-04-12

申请人： SAMSUNG ELECTRONICS CO., LTD.

发明人： Myung-Dong KO ,  Keon Yong CHEON ,  Dong Won KIM ,  Hyun Suk KIM ,  Sang Hyeon LEE ,  Hyung Suk LEE

IPC分类号： H01L27/088 ,  H01L29/06 ,  H01L29/423 ,  H01L29/786 ,  H01L21/28 ,  H01L21/8234

摘要： A semiconductor device including a substrate; first and second active patterns on the substrate, extending in a first direction and spaced apart in a second direction; gate electrodes on the first and second active patterns and extending in the second direction; a first gate separation structure between the first and second active patterns, extending in the first direction, and separating the gate electrodes; and a first element separation structure between the gate electrodes, extending in the second direction, and separating the second active pattern, wherein a distance to a first side of a first portion of the first gate separation structure is smaller than a distance to the first side of a second portion of the first gate separation structure, and a distance to the second side of the first portion is smaller than a distance from the second active pattern to the second side of the second portion.

公开(公告)号：US20220085016A1

公开(公告)日：2022-03-17

申请号：US17533212

申请日：2021-11-23

申请人： SAMSUNG ELECTRONICS CO., LTD.

发明人： Joong Gun OH ,  Sung Il PARK ,  Jae Hyun PARK ,  Hyung Suk LEE ,  Eun Sil PARK ,  Yun Il LEE

IPC分类号： H01L27/092 ,  H01L29/66 ,  H01L29/78 ,  H01L29/06 ,  H01L29/08 ,  H01L21/8238 ,  H01L21/308 ,  H01L29/423 ,  H01L21/768

摘要： A semiconductor device includes a fin type pattern extending in a first direction on a substrate, a first gate electrode extending in a second direction intersecting the first direction on the fin type pattern, a source/drain region on a side wall of the first gate electrode and in the fin type pattern, a separation structure extending in the first direction on the substrate, the separation structure including a first trench and being spaced apart from the fin type pattern and separating the first gate electrode, an interlayer insulating layer on a side wall of the separation structure and covering the source/drain region, the interlayer insulating layer including a second trench having a lower surface lower than a lower surface of the first trench, and a contact connected to the source/drain region and filling the first trench and the second trench.