利索-全球专利检索

  1. 登录
  2. 注册

搜索结果

7 条记录 (耗时 0.016 秒)

    Semiconductor device and data storage system including the same
    3.
    发明授权
    Semiconductor device and data storage system including the same 有权

    公开(公告)号：US12131995B2

    公开(公告)日：2024-10-29

    申请号：US18370913

    申请日：2023-09-21

    申请人： Samsung Electronics Co., Ltd.

    发明人： Seungyoon Kim ,  Jeongyong Sung ,  Sanghun Chun ,  Jihwan Kim ,  Sunghee Chung ,  Jeehoon Han

    IPC分类号： H10B43/27 ,  H01L23/528 ,  H01L29/423

    CPC分类号： H01L23/5283 ,  H01L29/42356 ,  H10B43/27

    摘要： A semiconductor device includes a pattern structure; a stack structure including gate layers stacked in a first region on the pattern structure and extending into a second region; a memory vertical structure penetrating the stack structure in the first region; gate contact plugs electrically connected to the gate layers in the second region; and a first peripheral contact plug spaced apart from the gate layers, the gate layers including a first gate layer, the gate contact plugs including a first gate contact plug electrically connected to the first gate layer, side surfaces of the first gate contact plug and the first peripheral contact plug having different numbers of upper bending portions, and the number of upper bending portions of the side surface of the first gate contact plug being greater than the number of upper bending portions of the side surface of the first peripheral contact plug.

    SEMICONDUCTOR DEVICE AND DATA STORAGE SYSTEM INCLUDING THE SAME
    4.
    发明申请
    SEMICONDUCTOR DEVICE AND DATA STORAGE SYSTEM INCLUDING THE SAME 有权

    公开(公告)号：US20220139831A1

    公开(公告)日：2022-05-05

    申请号：US17475128

    申请日：2021-09-14

    申请人： Samsung Electronics Co., Ltd.

    发明人： Seungyoon Kim ,  Jeongyong Sung ,  Sanghun Chun ,  Jihwan Kim ,  Sunghee Chung ,  Jeehoon Han

    IPC分类号： H01L23/528 ,  H01L27/11582 ,  H01L29/423

    摘要： A semiconductor device includes a pattern structure; a stack structure including gate layers stacked in a first region on the pattern structure and extending into a second region; a memory vertical structure penetrating the stack structure in the first region; gate contact plugs electrically connected to the gate layers in the second region; and a first peripheral contact plug spaced apart from the gate layers, the gate layers including a first gate layer, the gate contact plugs including a first gate contact plug electrically connected to the first gate layer, side surfaces of the first gate contact plug and the first peripheral contact plug having different numbers of upper bending portions, and the number of upper bending portions of the side surface of the first gate contact plug being greater than the number of upper bending portions of the side surface of the first peripheral contact plug.

    Semiconductor device and data storage system including the same
    6.
    发明授权
    Semiconductor device and data storage system including the same 有权

    公开(公告)号：US11791262B2

    公开(公告)日：2023-10-17

    申请号：US17475128

    申请日：2021-09-14

    申请人： Samsung Electronics Co., Ltd.

    发明人： Seungyoon Kim ,  Jeongyong Sung ,  Sanghun Chun ,  Jihwan Kim ,  Sunghee Chung ,  Jeehoon Han

    IPC分类号： H01L23/528 ,  H01L29/423 ,  H10B43/27

    CPC分类号： H01L23/5283 ,  H01L29/42356 ,  H10B43/27

    摘要： A semiconductor device includes a pattern structure; a stack structure including gate layers stacked in a first region on the pattern structure and extending into a second region; a memory vertical structure penetrating the stack structure in the first region; gate contact plugs electrically connected to the gate layers in the second region; and a first peripheral contact plug spaced apart from the gate layers, the gate layers including a first gate layer, the gate contact plugs including a first gate contact plug electrically connected to the first gate layer, side surfaces of the first gate contact plug and the first peripheral contact plug having different numbers of upper bending portions, and the number of upper bending portions of the side surface of the first gate contact plug being greater than the number of upper bending portions of the side surface of the first peripheral contact plug.

    THREE-DIMENSIONAL SEMICONDUCTOR MEMORY DEVICES, METHODS OF FABRICATING THE SAME, AND ELECTRONIC SYSTEMS INCLUDING THE SAME
    7.
    发明申请
    THREE-DIMENSIONAL SEMICONDUCTOR MEMORY DEVICES, METHODS OF FABRICATING THE SAME, AND ELECTRONIC SYSTEMS INCLUDING THE SAME 有权

    公开(公告)号：US20220216151A1

    公开(公告)日：2022-07-07

    申请号：US17537744

    申请日：2021-11-30

    申请人： Samsung Electronics Co., Ltd.

    发明人： Donghwan Kim ,  Shinhwan Kang ,  Youngji Noh ,  Jung-Hwan Park ,  Sanghun Chun

    IPC分类号： H01L23/535 ,  H01L23/522 ,  H01L27/11582 ,  H01L27/11573

    摘要： Disclosed are three-dimensional semiconductor memory devices, electronic systems including the same, and methods of fabricating the same. The three-dimensional semiconductor memory device includes a substrate including a cell array region and an extension region, a peripheral circuit structure including peripheral transistors on the substrate, a stack structure including interlayer dielectric layers and gate electrodes that are alternately stacked on the peripheral circuit structure, contacts that penetrate the stack structure on the extension region and are electrically connected with the peripheral transistors and include a protruding part contacting a sidewall of one of the gate electrodes and a vertical part penetrating the stack structure, and dielectric patterns between the vertical part and respective sidewalls of the gate electrodes. Top and bottom surfaces of each of the dielectric patterns are respectively in contact with adjacent ones of the interlayer dielectric layers.