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公开(公告)号：US09941172B2
公开(公告)日：2018-04-10
申请号：US15236427
申请日：2016-08-13
发明人： Jong-Doo Kim , Joong-Won Jeon , Young-Deok Kwon , Suk-Joo Lee
IPC分类号： H01L21/8234 , H01L27/02 , H01L23/522 , H01L23/528 , H01L21/768
CPC分类号： H01L21/823475 , H01L21/76804 , H01L21/76816 , H01L23/522 , H01L23/528 , H01L27/0207
摘要： A method for fabricating a semiconductor device is provided. The method for fabricating the semiconductor device includes forming an interlayer insulating layer that comprises a first region and a second region, forming an etch stop pattern for exposing the second region in the first region of the interlayer insulating layer and forming a mask pattern that comprises a first via-hole that exposes an upper surface of the etch stop pattern and a second via-hole that penetrates the interlayer insulating layer on the interlayer insulating layer and the etch stop pattern.
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2.发明授权公开(公告)号：US08952423B2
公开(公告)日：2015-02-10
申请号：US13785156
申请日：2013-03-05
发明人： Joong-Won Jeon , Hee-Sung Kang , Dae-Ho Yoon , Dal-Hee Lee , Suk-Joo Lee
CPC分类号： H01L27/0207 , H01L29/94
摘要： A semiconductor device includes a logic region disposed in a central region of the semiconductor device, and a peripheral region disposed in an outer region thereof. The logic region includes a line-shaped logic transistor and a box-shaped decoupling capacitor. The peripheral region includes a line-shaped peripheral transistor and a line-shaped peripheral dummy transistor disposed adjacent to the peripheral transistor.
摘要翻译： 半导体器件包括布置在半导体器件的中心区域中的逻辑区域和设置在其外部区域中的周边区域。 逻辑区域包括线形逻辑晶体管和盒形去耦电容器。 周边区域包括线形外围晶体管和与外围晶体管相邻设置的线状外围虚拟晶体管。
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3.发明授权Method of designing patterns of semiconductor devices in consideration of pattern density 有权考虑到图案密度来设计半导体器件的图案的方法公开(公告)号：US09557637B2
公开(公告)日：2017-01-31
申请号：US14449377
申请日：2014-08-01
发明人： Joong-Won Jeon , Ji-Youn Song , Mun-Su Shin , Seong-Yul Park , Suk-Joo Lee
CPC分类号： G03F1/36 , G03F1/70 , G03F7/70433
摘要： A method of designing patterns of semiconductor devices includes forming a plurality of tiles having patterns on a wafer, measuring the patterns of the plurality of tiles, analyzing the measurements of the patterns and determining a tile having such a size that the measurements linearly vary according to a design size and pattern density, and modifying the pattern density of the determined tile.
摘要翻译： 一种设计半导体器件图形的方法包括：在晶片上形成具有图案的多个瓦片，测量多个瓦片的图案，分析图案的测量结果，以及确定具有这样的尺寸的瓦片，使得测量值根据 设计尺寸和图案密度，以及修改确定的瓷砖的图案密度。
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4.发明授权Method of detecting focus shift in lithography process, method of analyzing error of transferred pattern using the same and method of manufacturing semiconductor device using the methods 有权在光刻工艺中检测焦点偏移的方法，使用该方法分析转印图案的误差的方法以及使用该方法制造半导体器件的方法公开(公告)号：US09570364B2
公开(公告)日：2017-02-14
申请号：US14675683
申请日：2015-03-31
发明人： Yong-Jin Chun , Suk-Joo Lee , Byoung-Il Choi
CPC分类号： H01L22/12 , G03F7/706 , G03F7/70641
摘要： A method of detecting focus shift in a lithography process, a method of analyzing an error of a transferred pattern using the same, and a method of manufacturing a semiconductor device using the methods are provided. The focus shift detecting method of a lithography process comprises generating a first contour band of a mask pattern between a first focus and a second focus, generating a second contour of the mask pattern between the first focus and a third focus, and determining whether focus shift of the mask pattern occurs using an intersection of the first contour band and the second contour band.
摘要翻译： 提供了一种在光刻工艺中检测焦点偏移的方法，使用该方法分析转印图案的误差的方法，以及使用该方法制造半导体器件的方法。 光刻处理的聚焦偏移检测方法包括在第一焦点和第二焦点之间产生掩模图案的第一轮廓带，在第一焦点和第三焦点之间产生掩模图案的第二轮廓，并且确定是否聚焦移位 使用第一轮廓带和第二轮廓带的交点发生掩模图案。
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5.发明授权Mask for photolithography, method for fabricating the same and method for manufacturing semiconductor device using the mask 有权光刻用掩模，其制造方法以及使用该掩模制造半导体器件的方法公开(公告)号：US09470972B2
公开(公告)日：2016-10-18
申请号：US14642660
申请日：2015-03-09
发明人： Jong-Doo Kim , Se-Jin Park , Suk-Joo Lee
IPC分类号： H01L21/302 , G03F1/26 , G03F1/28 , H01L21/308
摘要： A mask for photolithography and methods of manufacturing a mask and a semiconductor device are provided. The method of manufacturing a mask may comprise providing a substrate, forming a phase shift material layer on the substrate, forming a light blocking layer on the phase shift material layer, and forming a main pattern and a sub pattern on the substrate by patterning the phase shift material layer and the light blocking layer. The light blocking layer may be removed on the main pattern left on the light blocking layer remaining on the sub pattern. A semiconductor device may be manufactured using the mask to form a photoresist pattern on a semiconductor wafer. The pattern of the photoresist may be used to etch an object layer of the semiconductor wafer.
摘要翻译： 提供了用于光刻的掩模和制造掩模和半导体器件的方法。 制造掩模的方法可以包括提供衬底，在衬底上形成相移材料层，在相移材料层上形成光阻挡层，以及通过对相位进行图案化来在衬底上形成主图案和子图案 移位材料层和遮光层。 可以在保留在子图案上的遮光层上留下的主图案上去除遮光层。 可以使用掩模制造半导体器件，以在半导体晶片上形成光致抗蚀剂图案。 光致抗蚀剂的图案可以用于蚀刻半导体晶片的物体层。
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