公开(公告)号：US20130241037A1

公开(公告)日：2013-09-19

申请号：US13875731

申请日：2013-05-02

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Junho Jeong ,  Sukhun Choi ,  Jangeun Lee ,  Kyunghyun Kim ,  Sechung Oh ,  Kyungtae Nam

IPC: H01L49/02

CPC classification number: H01L28/20 ,  H01L21/7684 ,  H01L27/101 ,  H01L27/2409 ,  H01L27/2436 ,  H01L43/12 ,  H01L45/04 ,  H01L45/06 ,  H01L45/08 ,  H01L45/085 ,  H01L45/1233 ,  H01L45/126 ,  H01L45/143 ,  H01L45/144 ,  H01L45/147 ,  H01L45/1616 ,  H01L45/1625 ,  H01L45/1641

Abstract: Methods of fabricating semiconductor devices are provided including forming a dielectric interlayer on a substrate, the dielectric interlayer defining an opening therein. A metal pattern is formed in the opening. An oxidization process is performed on the metal pattern to form a conductive metal oxide pattern, and the conductive metal oxide pattern is planarized. Related semiconductor devices are also provided.

Abstract translation: 提供了制造半导体器件的方法，包括在衬底上形成电介质中间层，电介质层间限定开口。 在开口中形成金属图案。 对金属图案进行氧化处理以形成导电金属氧化物图案，并且导电金属氧化物图案被平坦化。 还提供了相关的半导体器件。

公开(公告)号：US08785901B2

公开(公告)日：2014-07-22

申请号：US13875731

申请日：2013-05-02

Applicant: Samsung Electronics Co., Ltd.

Inventor： Junho Jeong ,  Sukhun Choi ,  Jangeun Lee ,  Kyunghyun Kim ,  Sechung Oh ,  Kyungtae Nam

IPC: H01L27/24 ,  H01L45/00 ,  H01L27/10 ,  H01L21/768 ,  H01L49/02 ,  H01L43/12

CPC classification number: H01L28/20 ,  H01L21/7684 ,  H01L27/101 ,  H01L27/2409 ,  H01L27/2436 ,  H01L43/12 ,  H01L45/04 ,  H01L45/06 ,  H01L45/08 ,  H01L45/085 ,  H01L45/1233 ,  H01L45/126 ,  H01L45/143 ,  H01L45/144 ,  H01L45/147 ,  H01L45/1616 ,  H01L45/1625 ,  H01L45/1641

Abstract: Methods of fabricating semiconductor devices are provided including forming a dielectric interlayer on a substrate, the dielectric interlayer defining an opening therein. A metal pattern is formed in the opening. An oxidization process is performed on the metal pattern to form a conductive metal oxide pattern, and the conductive metal oxide pattern is planarized. Related semiconductor devices are also provided.

Abstract translation: 提供了制造半导体器件的方法，包括在衬底上形成电介质中间层，电介质层间限定开口。 在开口中形成金属图案。 对金属图案进行氧化处理以形成导电金属氧化物图案，并且导电金属氧化物图案被平坦化。 还提供了相关的半导体器件。

公开(公告)号：US09716162B2

公开(公告)日：2017-07-25

申请号：US14697829

申请日：2015-04-28

Applicant: Samsung Electronics Co., Ltd.

Inventor： Sangjine Park ,  Jae-Jik Baek ,  Myunggeun Song ,  Boun Yoon ,  Sukhun Choi ,  Jeongnam Han

IPC: H01L29/66 ,  H01L29/78 ,  H01L29/49

CPC classification number: H01L29/66545 ,  H01L21/0228 ,  H01L21/31051 ,  H01L21/31111 ,  H01L21/76897 ,  H01L29/0847 ,  H01L29/165 ,  H01L29/4983 ,  H01L29/6656 ,  H01L29/66636 ,  H01L29/66795 ,  H01L29/78 ,  H01L29/7848 ,  H01L29/785 ,  H01L29/7851

Abstract: Provided is a semiconductor device including a substrate with an active pattern, a gate electrode crossing the active pattern, and a gate capping pattern on the gate electrode. The gate capping pattern may have a width larger than that of the gate electrode, and the gate capping pattern may include extended portions extending toward the substrate and at least partially covering both sidewalls of the gate electrode.