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公开(公告)号:US08785901B2
公开(公告)日:2014-07-22
申请号:US13875731
申请日:2013-05-02
Applicant: Samsung Electronics Co., Ltd.
Inventor: Junho Jeong , Sukhun Choi , Jangeun Lee , Kyunghyun Kim , Sechung Oh , Kyungtae Nam
CPC classification number: H01L28/20 , H01L21/7684 , H01L27/101 , H01L27/2409 , H01L27/2436 , H01L43/12 , H01L45/04 , H01L45/06 , H01L45/08 , H01L45/085 , H01L45/1233 , H01L45/126 , H01L45/143 , H01L45/144 , H01L45/147 , H01L45/1616 , H01L45/1625 , H01L45/1641
Abstract: Methods of fabricating semiconductor devices are provided including forming a dielectric interlayer on a substrate, the dielectric interlayer defining an opening therein. A metal pattern is formed in the opening. An oxidization process is performed on the metal pattern to form a conductive metal oxide pattern, and the conductive metal oxide pattern is planarized. Related semiconductor devices are also provided.
Abstract translation: 提供了制造半导体器件的方法,包括在衬底上形成电介质中间层,电介质层间限定开口。 在开口中形成金属图案。 对金属图案进行氧化处理以形成导电金属氧化物图案,并且导电金属氧化物图案被平坦化。 还提供了相关的半导体器件。
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公开(公告)号:US12058941B2
公开(公告)日:2024-08-06
申请号:US17083943
申请日:2020-10-29
Applicant: Samsung Electronics Co., Ltd.
Inventor: Yongjae Kim , Kuhoon Chung , Gwanhyeob Koh , Bae-Seong Kwon , Kyungtae Nam
Abstract: A magnetic memory device includes a lower contact plug on a substrate and a data storage structure on the lower contact plug. The data storage structure includes a bottom electrode, a magnetic tunnel junction pattern, and a top electrode that are sequentially stacked on the lower contact plug. The lower contact plug and the data storage structure have a first thickness and a second thickness, respectively, in a first direction perpendicular to a top surface of the substrate. The first thickness of the lower contact plug is about 2.0 to 3.6 times the second thickness of the data storage structure.
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公开(公告)号:US20240349621A1
公开(公告)日:2024-10-17
申请号:US18752866
申请日:2024-06-25
Applicant: Samsung Electronics Co., Ltd.
Inventor: Yongjae Kim , Kuhoon Chung , Gwanhyeob Koh , Bae-Seong Kwon , Kyungtae Nam
Abstract: A magnetic memory device includes a lower contact plug on a substrate and a data storage structure on the lower contact plug. The data storage structure includes a bottom electrode, a magnetic tunnel junction pattern, and a top electrode that are sequentially stacked on the lower contact plug. The lower contact plug and the data storage structure have a first thickness and a second thickness, respectively, in a first direction perpendicular to a top surface of the substrate. The first thickness of the lower contact plug is about 2.0 to 3.6 times the second thickness of the data storage structure.
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公开(公告)号:US11152561B2
公开(公告)日:2021-10-19
申请号:US16867138
申请日:2020-05-05
Applicant: Samsung Electronics Co., Ltd.
Inventor: Bae-Seong Kwon , Yongjae Kim , Kyungtae Nam , Kuhoon Chung
Abstract: A magnetic memory device includes a lower contact plug on a substrate, a magnetic tunnel junction pattern on the lower contact plug, a bottom electrode, which is between the lower contact plug and the magnetic tunnel junction pattern and is in contact with a bottom surface of the magnetic tunnel junction pattern, and a top electrode on a top surface of the magnetic tunnel junction pattern. Each of the bottom electrode, the magnetic tunnel junction pattern, and the top electrode has a thickness in a first direction, which is perpendicular to a top surface of the substrate. A first thickness of the bottom electrode is about 0.6 to 1.1 times a second thickness of the magnetic tunnel junction pattern.
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公开(公告)号:US20210242396A1
公开(公告)日:2021-08-05
申请号:US17083943
申请日:2020-10-29
Applicant: Samsung Electronics Co., Ltd.
Inventor: Yongjae Kim , Kuhoon Chung , Gwanhyeob Koh , Bae-Seong Kwon , Kyungtae Nam
Abstract: A magnetic memory device includes a lower contact plug on a substrate and a data storage structure on the lower contact plug. The data storage structure includes a bottom electrode, a magnetic tunnel junction pattern, and a top electrode that are sequentially stacked on the lower contact plug. The lower contact plug and the data storage structure have a first thickness and a second thickness, respectively, in a first direction perpendicular to a top surface of the substrate. The first thickness of the lower contact plug is about 2.0 to 3.6 times the second thickness of the data storage structure.
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公开(公告)号:US10573806B1
公开(公告)日:2020-02-25
申请号:US16392046
申请日:2019-04-23
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor: Kyungtae Nam , Seung Pil Ko , Woojin Kim , Hyunchul Shin , Youngsoo Choi
Abstract: A method of fabricating a semiconductor device includes forming a magnetic tunnel junction layer including a first magnetic layer, a second magnetic layer, and a tunnel barrier layer interposed between the first and second magnetic layers, patterning the magnetic tunnel junction layer to form a magnetic tunnel junction pattern, forming an insulating layer to cover the magnetic tunnel junction pattern, and performing a thermal treatment process to crystallize at least a portion of the first and second magnetic layers. The thermal treatment process may include performing a first thermal treatment process at a first temperature, after the forming of the magnetic tunnel junction layer, and performing a second thermal treatment process at a second temperature, which is higher than or equal to the first temperature, after the forming of the insulating layer.
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公开(公告)号:US20130241037A1
公开(公告)日:2013-09-19
申请号:US13875731
申请日:2013-05-02
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor: Junho Jeong , Sukhun Choi , Jangeun Lee , Kyunghyun Kim , Sechung Oh , Kyungtae Nam
IPC: H01L49/02
CPC classification number: H01L28/20 , H01L21/7684 , H01L27/101 , H01L27/2409 , H01L27/2436 , H01L43/12 , H01L45/04 , H01L45/06 , H01L45/08 , H01L45/085 , H01L45/1233 , H01L45/126 , H01L45/143 , H01L45/144 , H01L45/147 , H01L45/1616 , H01L45/1625 , H01L45/1641
Abstract: Methods of fabricating semiconductor devices are provided including forming a dielectric interlayer on a substrate, the dielectric interlayer defining an opening therein. A metal pattern is formed in the opening. An oxidization process is performed on the metal pattern to form a conductive metal oxide pattern, and the conductive metal oxide pattern is planarized. Related semiconductor devices are also provided.
Abstract translation: 提供了制造半导体器件的方法,包括在衬底上形成电介质中间层,电介质层间限定开口。 在开口中形成金属图案。 对金属图案进行氧化处理以形成导电金属氧化物图案,并且导电金属氧化物图案被平坦化。 还提供了相关的半导体器件。
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