公开(公告)号：US20210027993A1

公开(公告)日：2021-01-28

申请号：US16905018

申请日：2020-06-18

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Sungyeon KIM ,  Jungpyo HONG ,  Kwangnam KIM ,  Hyungjun KIM ,  Jongwoo SUN

IPC: H01J37/32 ,  H01L21/67

Abstract: A substrate treating apparatus, including a process chamber having a bottom portion configured to secure a substrate while a substrate treating process is performed on the substrate; and a dielectric window arranged at an upper portion of the process chamber to define a process space, and including: an insulative body, an antenna disposed on an upper surface of the insulative body, a protection layer disposed on a lower surface of the insulative body, and an etch resistor protruding from at least a portion of the protection layer toward the process space, wherein, based on power being applied to the antenna, a plasma is generated in the process space, and wherein the insulative body is protected from the plasma by the protection layer and the etch resistor.

公开(公告)号：US20220286400A1

公开(公告)日：2022-09-08

申请号：US17501470

申请日：2021-10-14

Applicant: Samsung Electronics Co., Ltd.

Inventor： Byeongjo PARK ,  Sungyeon KIM ,  Kukjin KIM ,  Sungjun PARK ,  Jeongbae SEO ,  Byungho AN

IPC: H04L12/853 ,  H04L1/18 ,  H04L12/823 ,  H04L12/26

Abstract: An electronic device includes a NACK buffer configured to temporarily store first packets and second packets, and processing circuitry configured to generate a plurality of frames, which include reference frames depending on decoding of another frame and non-reference frames independent of decoding of another frame, based on hierarchical predictive (P) coding, generate the first packets forming the reference frames and the second packets forming the non-reference frames, based on the plurality of frames, transmit the first packets and the second packets to an external device, receive a NACK request indicating retransmission target packets that have failed to be received by the external device, determine to not retransmit at least some of the retransmission target packets corresponding to the NACK request.

公开(公告)号：US20160293445A1

公开(公告)日：2016-10-06

申请号：US15066492

申请日：2016-03-10

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Je-Woo HAN ,  Junho YOON ,  Kyohyeok KIM ,  Dongchan KIM ,  Sungyeon KIM ,  Jaehong PARK ,  Jinyoung PARK ,  KyungYub JEON

IPC: H01L21/311

CPC classification number: H01L21/31144 ,  H01L21/31116 ,  H01L21/76816

Abstract: A method of fabricating a semiconductor device is disclosed. The method may include forming an target layer on a substrate, forming a mask pattern on a target layer, performing a first process to etch the target layer and form a first sub-trench, and performing a second process to further etch the target layer and form a second sub-trench. First and second sidewall patterns may be formed on a sidewall of the mask pattern to be used as an etch mask in the first and second processes, respectively. Outer sidewalls of the first and second sidewall patterns may be formed to have different angles with respect to a top surface of the substrate.

Abstract translation: 公开了制造半导体器件的方法。 该方法可以包括在衬底上形成目标层，在目标层上形成掩模图案，执行蚀刻目标层并形成第一子沟槽的第一工艺，以及执行第二工艺以进一步蚀刻目标层和 形成第二子沟槽。 第一和第二侧壁图案可分别形成在掩模图案的侧壁上，以分别在第一和第二工艺中用作蚀刻掩模。 第一和第二侧壁图案的外侧壁可以形成为相对于基板的顶表面具有不同的角度。

公开(公告)号：US20240196603A1

公开(公告)日：2024-06-13

申请号：US18508445

申请日：2023-11-14

Applicant: Samsung Electronics Co., Ltd.

Inventor： Kwanghee CHEON ,  Hyukwoo KWON ,  Munjun KIM ,  Sungyeon KIM ,  Younseok CHOI

IPC: H10B12/00 ,  H01L29/423

CPC classification number: H10B12/488 ,  H01L29/4236 ,  H10B12/50

Abstract: An integrated circuit device includes a substrate having a plurality of active regions defined by a device isolation trench, a device isolation structure including an etching induction film and filling the device isolation trench, the etching induction film covering a bottom surface of the device isolation trench, a word line trench intersecting with the plurality of active regions and the device isolation structure and extending in a first lateral direction, a gate dielectric film covering an inner wall of the word line trench, and a word line filling a portion of the word line trench on the gate dielectric film, wherein each of the plurality of active regions includes a fin body portion under the word line and a saddle fin portion protruding from the fin body portion toward the word line, and the etching induction film is exposed by the word line trench.

公开(公告)号：US20210035830A1

公开(公告)日：2021-02-04

申请号：US16821415

申请日：2020-03-17

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Kwangnam KIM ,  Nohsung KWAK ,  Sungyeon KIM ,  Hyungjun KIM ,  Haejoong PARK ,  Jongwoo SUN ,  Sangrok OH ,  Ilyoung HAN ,  Jungpyo HONG

IPC: H01L21/67 ,  H01L21/687 ,  H01L21/673 ,  H01L21/677

Abstract: A semiconductor manufacturing apparatus including at least one load module including a load port on which a substrate container is located, a plurality of substrates being mountable on the substrate container; at least one loadlock module including a loadlock chamber directly connected to the substrate container, the loadlock chamber interchangeably having atmospheric pressure and vacuum pressure, a first transfer robot within the loadlock chamber, and a substrate stage within the loadlock chamber, the plurality of substrates being mountable on the substrate stage; a transfer module including a transfer chamber connected to the loadlock chamber, a second transfer robot within the transfer chamber, and a substrate aligner within the transfer chamber; and at least one process module including at least one process chamber connected to the transfer module.