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    SEMICONDUCTOR PACKAGE
    1.
    发明申请
    SEMICONDUCTOR PACKAGE 有权

    公开(公告)号：US20210028137A1

    公开(公告)日：2021-01-28

    申请号：US16795733

    申请日：2020-02-20

    Applicant: Samsung Electronics Co., Ltd.

    Inventor： GWANGJAE JEON ,  DONGKYU KIM ,  JUNG-HO PARK ,  YEONHO JANG

    IPC: H01L23/00 ,  H01L21/768 ,  H01L23/498 ,  H01L23/31

    Abstract: Disclosed is a semiconductor package comprising a redistribution substrate, and a semiconductor chip on a top surface of the redistribution substrate. The redistribution substrate includes an under-bump pattern, a lower dielectric layer that covers a sidewall of the under-bump pattern, and a first redistribution pattern on the lower dielectric layer. The first redistribution pattern includes a first line part. A width at a top surface of the under-bump pattern is greater than a width at a bottom surface of the under-bump pattern. A thickness of the under-bump pattern is greater than a thickness of the first line part.

    SEMICONDUCTOR PACKAGE
    2.
    发明申请
    SEMICONDUCTOR PACKAGE 有权

    公开(公告)号：US20250132218A1

    公开(公告)日：2025-04-24

    申请号：US18623488

    申请日：2024-04-01

    Applicant: SAMSUNG ELECTRONICS CO., LTD.

    Inventor： KYUNG DON MUN ,  WOOYOUNG KIM ,  YEONHO JANG ,  HYEONJEONG HWANG

    IPC: H01L23/367 ,  H01L23/00 ,  H01L23/31 ,  H01L23/373 ,  H01L25/00 ,  H01L25/18

    Abstract: A semiconductor package includes: a first substrate; a first semiconductor chip; a second semiconductor chip being spaced apart, in a first direction, from the first substrate, the first direction being parallel to a top surface of the first substrate; at least one thermal radiation structure on the first substrate and between the first semiconductor chip and the second semiconductor chip; and a third semiconductor chip on the first semiconductor chip, the second semiconductor chip, and the at least one thermal radiation structure, wherein the at least one thermal radiation structure includes: a thermal radiation post; and a thermal conductive pattern on the thermal radiation post, wherein a bottom surface of the third semiconductor chip is in contact with the thermal conductive pattern, and wherein the top surface of the first substrate is in contact with the thermal radiation post.

    SEMICONDUCTOR PACKAGE DEVICE
    3.
    发明申请
    SEMICONDUCTOR PACKAGE DEVICE 有权

    公开(公告)号：US20220084993A1

    公开(公告)日：2022-03-17

    申请号：US17239956

    申请日：2021-04-26

    Applicant: Samsung Electronics Co., Ltd.

    Inventor： DONGKYU KIM ,  SEOKHYUN LEE ,  YEONHO JANG ,  JAEGWON JANG

    IPC: H01L25/10 ,  H01L23/00 ,  H01L23/31 ,  H01L23/538 ,  H01L21/683 ,  H01L21/48 ,  H01L21/56 ,  H01L25/00

    Abstract: A semiconductor package device includes a first semiconductor package, a second semiconductor package, and first connection terminals between the first and second semiconductor packages. The first semiconductor package includes a lower redistribution substrate, a semiconductor chip, and an upper redistribution substrate vertically spaced apart from the lower redistribution substrate across the semiconductor chip. The upper redistribution substrate includes a dielectric layer, redistribution patterns vertically stacked in the dielectric layer and each including line and via parts, and bonding pads on uppermost redistribution patterns. The bonding pads are exposed from the dielectric layer and in contact with the first connection terminals. A diameter of each bonding pad decreases in a first direction from a central portion at a top surface of the upper redistribution substrate to an outer portion at the top surface thereof. A thickness of each bonding pad increases in the first direction.

    SEMICONDUCTOR PACKAGE AND METHOD OF FABRICATING THE SAME
    6.
    发明申请
    SEMICONDUCTOR PACKAGE AND METHOD OF FABRICATING THE SAME 有权

    公开(公告)号：US20220415771A1

    公开(公告)日：2022-12-29

    申请号：US17670635

    申请日：2022-02-14

    Applicant: Samsung Electronics Co., Ltd.

    Inventor： HYEONJEONG HWANG ,  DONGKYU KIM ,  MINJUNG KIM ,  YEONHO JANG

    IPC: H01L23/498 ,  H01L23/31

    Abstract: A semiconductor package including a redistribution substrate extending in a first direction and a second direction perpendicular to the first direction, a semiconductor chip mounted on a top surface of the redistribution substrate, and an outer terminal on a bottom surface of the redistribution substrate. The redistribution substrate may include an under-bump pattern, a redistribution insulating layer covering a top surface and a side surface of the under-bump pattern, a protection pattern interposed between the top surface of the under-bump pattern and the redistribution insulating layer, and interposed between the side surface of the under-bump pattern and the redistribution insulating layer, and a redistribution pattern on the under-bump pattern. The outer terminal may be disposed on a bottom surface of the under-bump pattern.

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