SCALABLE AND CONFIGURABLE NON-VOLATILE MEMORY MODULE ARRAY
    1.
    发明申请
    SCALABLE AND CONFIGURABLE NON-VOLATILE MEMORY MODULE ARRAY 有权
    可扩展和可配置的非易失性存储器模块阵列

    公开(公告)号:US20160259551A1

    公开(公告)日:2016-09-08

    申请号:US14809165

    申请日:2015-07-24

    Inventor: Zhan PING

    CPC classification number: G06F3/061 G06F3/0655 G06F3/0688 G06F13/4022

    Abstract: Embodiments of the inventive concept include a non-volatile memory module array system. The system can include non-volatile memory modules each including a first port, a second port, solid state drives, a switch, and a port configuration logic section. The system can include a bus connected to the first or second ports. The system can include a host to communicate with the non-volatile memory modules via the bus. The port configuration logic section can toggle between a first port configuration associated with the second port and a second port configuration associated with the second port. The port configuration logic section can include a first non-volatile configuration section to store the first and second port configurations associated with the second port. The first port configuration can cause the second port to operate as a downstream port. The second port configuration can cause the second port to operate as an upstream port.

    Abstract translation: 本发明构思的实施例包括非易失性存储器模块阵列系统。 该系统可以包括各自包括第一端口,第二端口,固态驱动器,交换机和端口配置逻辑部分的非易失性存储器模块。 该系统可以包括连接到第一或第二端口的总线。 该系统可以包括通过总线与非易失性存储器模块进行通信的主机。 端口配置逻辑部分可以在与第二端口相关联的第一端口配置和与第二端口相关联的第二端口配置之间切换。 端口配置逻辑部分可以包括用于存储与第二端口相关联的第一和第二端口配置的第一非易失性配置部分。 第一个端口配置可以使第二个端口作为下游端口运行。 第二个端口配置可以使第二个端口作为上行端口运行。

    MODULAR NGSFF MODULE TO MEET DIFFERENT DENSITY AND LENGTH REQUIREMENTS

    公开(公告)号:US20220261610A1

    公开(公告)日:2022-08-18

    申请号:US17683301

    申请日:2022-02-28

    Inventor: Zhan PING

    Abstract: An assembly for a solid-state drive (SSD) includes a base printed circuit board having a PCIe adapter form factor, and at least one U.2 connector that is capable of being connected to a NGSFF device. The NGSFF device includes an NGSFF PCB, a first PCIe connector and a second PCIe connector. The NGSFF PCB is capable of receiving at least one SSD device and includes a first end and a second end in which the first end is opposite the second end. The first PCIe connector is at an edge of the first end of the NGSFF PCB and is capable of physical insertion into the at least one U.2 connector on the base PCB, and the second PCIe connector is at an edge of the second end of the NGSFF PCB and is capable of receiving a first PCIe connector of another NGSFF PCB.

    SOLID STATE DRIVE MULTI-CARD ADAPTER WITH INTEGRATED PROCESSING

    公开(公告)号:US20210208821A1

    公开(公告)日:2021-07-08

    申请号:US17206106

    申请日:2021-03-18

    Abstract: Embodiments of the inventive concept include solid state drive (SSD) multi-card adapters that can include multiple solid state drive cards, which can be incorporated into existing enterprise servers without major architectural changes, thereby enabling the server industry ecosystem to easily integrate evolving solid state drive technologies into servers. The SSD multi-card adapters can include an interface section between various solid state drive cards and drive connector types. The interface section can perform protocol translation, packet switching and routing, data encryption, data compression, management information aggregation, virtualization, and other functions.

    MODULAR NGSFF MODULE TO MEET DIFFERENT DENSITY AND LENGTH REQUIREMENTS

    公开(公告)号:US20190095774A1

    公开(公告)日:2019-03-28

    申请号:US15853669

    申请日:2017-12-22

    Inventor: Zhan PING

    Abstract: An assembly for a solid-state drive (SSD) includes a base printed circuit board having a PCIe adapter form factor, and at least one U.2 connector that is capable of being connected to a NGSFF device. The NGSFF device includes an NGSFF PCB, a first PCIe connector and a second PCIe connector. The NGSFF PCB is capable of receiving at least one SSD device and includes a first end and a second end in which the first end is opposite the second end. The first PCIe connector is at an edge of the first end of the NGSFF PCB and is capable of physical insertion into the at least one U.2 connector on the base PCB, and the second PCIe connector is at an edge of the second end of the NGSFF PCB and is capable of receiving a first PCIe connector of another NGSFF PCB.

    HARD DISK DRIVE FORM FACTOR SOLID STATE DRIVE MULTI-CARD ADAPTER
    7.
    发明申请
    HARD DISK DRIVE FORM FACTOR SOLID STATE DRIVE MULTI-CARD ADAPTER 审中-公开
    硬盘驱动器形式因素固态驱动多卡适配器

    公开(公告)号:US20160259754A1

    公开(公告)日:2016-09-08

    申请号:US14918556

    申请日:2015-10-20

    Inventor: Zhan PING

    Abstract: Embodiments of the inventive concept include 2.5 inch hard disk drive form factor solid state drive multi-card adapters that can include multiple M.2 solid state drive cards, which can be incorporated into existing enterprise servers without major architectural changes, thereby enabling the server industry ecosystem to easily integrate M.2 solid state drive technology into servers. Multiple M.2 solid state drive cards and a peripheral component interconnect express (PCIe) switch can be included within a 2.5 inch hard disk drive form factor solid state drive multi-card adapter. The solid state drive multi-card adapters can be attached to or seated within drive bays of a computer server that supports non-volatile memory express (NVMe) 2.5 inch drives without any changes to the server architecture, thereby providing a straight-forward upgrade path.

    Abstract translation: 本发明构思的实施例包括2.5英寸硬盘驱动器形状因子固态驱动器多卡适配器,其可以包括多个M.2固态驱动器卡,其可并入现有的企业服务器而没有主要的架构变化,从而使得服务器行业 生态系统将M.2固态硬盘技术轻松集成到服务器中。 多个M.2固态驱动器卡和外围组件互连快速(PCIe)开关可以包含在2.5英寸硬盘驱动器外形固态驱动器多卡适配器中。 固态驱动器多卡适配器可以连接到或位于支持非易失性存储器快速(NVMe)2.5英寸驱动器的计算机服务器的驱动器托架中,而不会对服务器架构进行任何更改,从而提供直接升级路径 。

    RANK AND PAGE REMAPPING LOGIC IN A VOLATILE MEMORY
    8.
    发明申请
    RANK AND PAGE REMAPPING LOGIC IN A VOLATILE MEMORY 有权
    排列和页面重写在一个挥发性的记忆中的逻辑

    公开(公告)号:US20160147623A1

    公开(公告)日:2016-05-26

    申请号:US14720934

    申请日:2015-05-25

    Abstract: Embodiments of the inventive concept include a plurality of memory ranks, a buffer chip including a rank remap control section configured to remap a rank from among the plurality of memory ranks of the volatile memory module responsive to a failure of the rank, and a dynamic serial presence detect section configured to dynamically update a stated total capacity of the volatile memory module based at least on the remapped rank. In some embodiments, a memory module includes a plurality of memory ranks, an extra rank in addition to the plurality of memory ranks, the extra rank being a spare rank configured to store a new page corresponding to a failed page from among the plurality of ranks, and a buffer chip including a page remap control section configured to remap the failed page from among the plurality of ranks to the new page in the extra rank.

    Abstract translation: 本发明构思的实施例包括多个存储器级别,缓冲器芯片,其包括等级重映射控制部分,其被配置为响应于该级别的故障而从易失性存储器模块的多个存储器级别中重新排列等级,以及动态串行 存在检测部分被配置为至少基于重新映射的秩动态地更新所述易失性存储器模块的所述总容量。 在一些实施例中,存储器模块包括多个存储器级别,除了多个存储器排队之外的额外级别,额外级别是被配置为存储对应于多个级别中的失败页面的新页面的备用级别 以及包括页重新映射控制部分的缓冲器芯片,被配置为将多个等级中的故障页面重新映射到额外等级的新页面。

    DYNAMIC THERMAL BUDGET ALLOCATION FOR MULTI-PROCESSOR SYSTEMS
    9.
    发明申请
    DYNAMIC THERMAL BUDGET ALLOCATION FOR MULTI-PROCESSOR SYSTEMS 有权
    多处理器系统的动态热预算分配

    公开(公告)号:US20150185814A1

    公开(公告)日:2015-07-02

    申请号:US14292785

    申请日:2014-05-30

    CPC classification number: G06F1/329 G06F1/206 Y02D10/16 Y02D10/24

    Abstract: Embodiments of the present inventive concept relate to systems and methods for dynamically allocating and/or redistributing thermal budget to each processor from a total processor thermal budget based on the workload of each processor. In this manner, the processor(s) having a higher workload can receive a higher thermal budget. The allocation can be dynamically adjusted over time. The individual and overall processor performance increases while efficiently allocating the total thermal budget. By dynamically sharing the total thermal budget of the system, the performance of the system as a whole is increased, thereby lowering, for example, the total cost of ownership (TCO) of datacenters.

    Abstract translation: 本发明构思的实施例涉及用于基于每个处理器的工作负荷从总处理器热预算动态地分配和/或再分配热预算到每个处理器的系统和方法。 以这种方式,具有较高工作负载的处理器可以接收更高的热预算。 分配可以随时间动态调整。 个体和整体处理器性能提高,同时有效分配总体热预算。 通过动态共享系统的总体热预算,整个系统的性能提高,从而降低了数据中心的总拥有成本(TCO)。

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