公开(公告)号：US07911875B2

公开(公告)日：2011-03-22

申请号：US12345199

申请日：2008-12-29

申请人： Sang Hoon Shin ,  Won Jun Choi

发明人： Sang Hoon Shin ,  Won Jun Choi

IPC分类号： G11C8/00

CPC分类号： G11C29/20 ,  G11C8/04

摘要： An address counting circuit includes a counter configured to sequentially count from an initial address in response to a clock signal in order to output counted addresses. The address counting circuit also includes a code conversion unit that is configured to output converted addresses such that only one address bit of the converted addresses with respect to the previous converted addresses are toggled to output the converted addresses. The converted addresses output form the code conversion unit do not overlap with one another.

摘要翻译： 地址计数电路包括被配置为响应于时钟信号从初始地址顺序计数以计数地址的计数器。 地址计数电路还包括代码转换单元，其被配置为输出转换的地址，使得相对于先前转换的地址仅转换地址的一个地址位被切换以输出转换的地址。 从代码转换单元输出的转换地址不会彼此重叠。

公开(公告)号：US08780951B2

公开(公告)日：2014-07-15

申请号：US12622192

申请日：2009-11-19

申请人： Jin Dong Song ,  Won Jun Choi ,  Jung Il Lee

发明人： Jin Dong Song ,  Won Jun Choi ,  Jung Il Lee

IPC分类号： H01S3/08

CPC分类号： H01S5/183 ,  H01L33/105 ,  H01S2304/00 ,  H01S2304/02

摘要： There is provided a distributed Bragg's reflector (DBR) comprising a substrate and an unit distributed Bragg's reflector (DBR) layer, wherein a multi-layer is laminated on the substrate. The unit DBR layer is composed of a multi-layer laminated structure of unit digital-alloy multinary compound semiconductor layer/multinary compound semiconductor layer or unit digital-alloy multinary compound semiconductor layer/unit digital-alloy multinary compound semiconductor layer. The unit digital-alloy multinary compound semiconductor layer is composed of the multi-layer laminated structure of the first layer of multinary compound semiconductor and the second layer of a different multinary compound semiconductor on said first layer. The digital-alloy distributed Bragg's reflector of the present invention has a uniform quality on the substance area and the filter and reflector having uniformly high quality can be mass produced by using the reflector.

摘要翻译： 提供了一种分布式布拉格反射器（DBR），其包括基板和单元分布布拉格反射器（DBR）层，其中多层层压在基板上。 单元DBR层由单元数字合金多元化合物半导体层/多元化合物半导体层或单元数字合金多元化合物半导体层/单元数字合金多元化合物半导体层的多层层叠结构组成。 单元数字合金多元化合物半导体层由第一层多元化合物半导体的多层层叠结构和在第一层上的不同的多元化合物半导体的第二层组成。 本发明的数字合金分布布拉格反射体在物质面积上具有均匀的质量，并且可以通过使用反射体大量生产具有均匀高质量的过滤器和反射器。

公开(公告)号：US08248878B2

公开(公告)日：2012-08-21

申请号：US12633900

申请日：2009-12-09

申请人： Won Jun Choi

发明人： Won Jun Choi

IPC分类号： G11C7/00

CPC分类号： G11C11/406 ,  G11C11/40615 ,  G11C2211/4065 ,  G11C2211/4067

摘要： Circuits for generating refresh period signals and semiconductor integrated circuits using the same are presented. The refresh period signal generation circuit can include an oscillator, a pulse generation unit, and a signal controller. The oscillator is configured to generate an oscillation signal in response to a refresh duration correction signal. The pulse generation unit is configured to generate a refresh period signal in response to the oscillation signal. The signal controller configured to generate the refresh duration correction signal, which corrects an active time of a refresh duration signal, in response to the oscillation signal.

摘要翻译： 提出了用于产生刷新周期信号的电路和使用其的半导体集成电路。 刷新周期信号发生电路可以包括振荡器，脉冲发生单元和信号控制器。 振荡器被配置为响应于刷新持续时间校正信号产生振荡信号。 脉冲发生单元被配置为响应于振荡信号产生刷新周期信号。 所述信号控制器被配置为响应于所述振荡信号产生刷新持续时间校正信号，所述刷新持续时间校正信号校正刷新持续时间信号的有效时间。

公开(公告)号：US20090257300A1

公开(公告)日：2009-10-15

申请号：US12347228

申请日：2008-12-31

申请人： Won Jun Choi ,  Jeong Woo Lee ,  Hyung Wook Moon

发明人： Won Jun Choi ,  Jeong Woo Lee ,  Hyung Wook Moon

IPC分类号： G11C7/00 ,  G11C29/00

CPC分类号： G11C17/18 ,  G11C29/80

摘要： A fuse information control device having a delay circuit to delay an active signal, includes a fuse circuit that outputs fuse information in response to a fuse information control signal, and a fuse information control signal generating unit that generates the fuse information control signal in response to one of the active signal and internal delay signals of the delay circuit.

摘要翻译： 一种具有延迟有源信号的延迟电路的熔丝信息控制装置，包括响应熔丝信息控制信号输出熔丝信息的熔丝电路，以及响应于熔丝信息控制信号生成熔丝信息控制信号的熔丝信息控制信号产生单元 延迟电路的有效信号和内部延迟信号之一。

公开(公告)号：US07350370B2

公开(公告)日：2008-04-01

申请号：US11151257

申请日：2005-06-14

申请人： Sung Kwan Park ,  Jeong Weon Ju ,  Won Jun Choi ,  Kyo Ha Keum

发明人： Sung Kwan Park ,  Jeong Weon Ju ,  Won Jun Choi ,  Kyo Ha Keum

IPC分类号： F25D23/12

CPC分类号： F24F1/0007 ,  F24F13/28 ,  F24F2001/0048 ,  Y10S55/31

摘要： An indoor unit of an air conditioner is provided. The indoor unit includes a main chassis, a front frame, a heat exchanger and a fan, a front panel, a filter, and a filter frame. The main chassis constitutes a rear appearance. The front frame is formed on the front of the main chassis to constitute a front appearance. The heat exchanger and the fan are disposed in the inside of the main chassis. The front panel shields the front side of the front frame. The filter is formed at the back of the front panel to filter foreign substance. The filter frame is integrally formed with the front frame to fix the filter.

摘要翻译： 提供一种空调的室内机。 室内机包括主底盘，前框架，热交换器和风扇，前面板，过滤器和过滤器框架。 主底盘构成后部外观。 前框架形成在主机箱的前部，构成前部外观。 热交换器和风扇设置在主机箱的内部。 前面板屏蔽前框架的前侧。 过滤器形成在前面板的后面以过滤异物。 过滤器框架与前框架一体地形成以固定过滤器。

公开(公告)号：US20100091599A1

公开(公告)日：2010-04-15

申请号：US12347055

申请日：2008-12-31

申请人： Hyung Wook Moon ,  Jeong Woo Lee ,  Won Jun Choi

发明人： Hyung Wook Moon ,  Jeong Woo Lee ,  Won Jun Choi

IPC分类号： G11C8/00

CPC分类号： G11C8/12 ,  G11C7/1045 ,  G11C11/408

摘要： A semiconductor memory apparatus includes first and second bank blocks, a mode generator configured to generate a chip select mode signal used to control an operational mode of the first and second bank blocks, and a controller configured to drive the first and second bank blocks in response to the chip select mode signal, first and second select signals, and a predetermined address signal that are used to control driving of the first and second bank blocks, wherein the controller receives the chip select mode signal having a level used to determine a single chip mode to control operation of the first and second bank blocks in one rank unit, and the first and second bank blocks are selectively activated by using the predetermined address signal.

摘要翻译： 半导体存储装置包括第一和第二存储块，模式发生器，被配置为产生用于控制第一和第二存储块的操作模式的芯片选择模式信号;以及控制器，被配置为响应于驱动第一和第二存储块 与芯片选择模式信号，第一和第二选择信号以及用于控制第一和第二存储块的驱动的预定地址信号，其中控制器接收具有用于确定单个芯片的电平的芯片选择模式信号 模式，以一个等级单位来控制第一和第二存储区块的操作，并且通过使用预定的地址信号来选择性地激活第一和第二存储体块。

公开(公告)号：US07656728B2

公开(公告)日：2010-02-02

申请号：US11823302

申请日：2007-06-26

申请人： Won Jun Choi

发明人： Won Jun Choi

IPC分类号： G11C29/00

CPC分类号： G11C29/02 ,  G11C29/026

摘要： A sense amplifier screen circuit and a screen method thereof are disclosed. The sense amplifier screen circuit includes a test mode signal generator for generating a test mode signal, a voltage regulator for regulating a bit line precharge voltage in response to the test mode signal, and a driving controller for generating a sense amplifier drive signal and a bit line equalize signal in response to the test mode signal.

摘要翻译： 公开了一种读出放大器屏幕电路及其屏幕方法。 感测放大器屏幕电路包括用于产生测试模式信号的测试模式信号发生器，用于响应于测试模式信号调节位线预充电电压的电压调节器，以及用于产生读出放大器驱动信号和位 响应于测试模式信号的线路均衡信号。

公开(公告)号：US20090101888A1

公开(公告)日：2009-04-23

申请号：US11966580

申请日：2007-12-28

申请人： Jin-Dong Song ,  Ju-Young Lim ,  Joonyeon Chang ,  Won Jun Choi

发明人： Jin-Dong Song ,  Ju-Young Lim ,  Joonyeon Chang ,  Won Jun Choi

IPC分类号： H01L29/12 ,  H01L21/36

CPC分类号： H01L29/127 ,  B82Y10/00 ,  H01L21/0237 ,  H01L21/02395 ,  H01L21/02439 ,  H01L21/02463 ,  H01L21/02502 ,  H01L21/02513 ,  H01L21/02546 ,  H01L21/02549 ,  H01L21/02631 ,  H01L29/205

摘要： Disclosed is a method of manufacturing a semiconductor device whereby InAs(1-x)Sbx semiconductor layer is formed on an easily available and economical semiconductor substrate such as a GaAs substrate or a Si substrate. According to the method, a quantum dot layer is formed between a semiconductor substrate and a semiconductor layer to reduce defects caused by lattice mismatch between the semiconductor layer and the semiconductor layer. The method may improve the growth speed of the semiconductor layer. In addition, because the InSb layer provided by the present invention has an electron mobility greater at room temperature, it may improve the quality and productivity of the semiconductor device.

摘要翻译： 公开了一种制造半导体器件的方法，其中InAs（1-x）Sbx半导体层形成在易于获得且经济的半导体衬底例如GaAs衬底或Si衬底上。 根据该方法，在半导体衬底和半导体层之间形成量子点层，以减少由半导体层和半导体层之间的晶格失配引起的缺陷。 该方法可以提高半导体层的生长速度。 此外，由于本发明提供的InSb层在室温下的电子迁移率更大，所以可以提高半导体器件的质量和生产率。

公开(公告)号：US20080134704A1

公开(公告)日：2008-06-12

申请号：US12068523

申请日：2008-02-07

申请人： Sung Kwan Park ,  Jeong Weon Ju ,  Won Jun Choi ,  Kyo Ha Keum

发明人： Sung Kwan Park ,  Jeong Weon Ju ,  Won Jun Choi ,  Kyo Ha Keum

IPC分类号： F25D23/12

CPC分类号： F24F1/0007 ,  F24F13/28 ,  F24F2001/0048 ,  Y10S55/31

摘要： An indoor unit of an air conditioner is provided. The indoor unit includes a main chassis constituting a rear appearance, a heat exchanger and a fan disposed in an inner space of the main chassis, and a front frame formed on a front of the main chassis and constituting a front appearance. The front frame includes a suction port for sucking air of a space for air-conditioning, a high-performance filter-mount part formed on one side of the suction port for fixing the high performance filter, a dust-collecting filter-fixing part formed on one side of the high-performance filter-mount part for fixing the dust-collecting filter, and a discharge port formed on one side of the dust-collecting filter-fixing part for discharging air that has been sucked to the suction port.

摘要翻译： 提供一种空调的室内机。 室内机包括构成后部外观的主底盘，设置在主机壳的内部空间中的热交换器和风扇，以及形成在主机架的前部并构成前部外观的前框架。 前框架包括用于吸入用于空调的空间的空气的吸入口，形成在用于固定高性能过滤器的吸入口的一侧上的高性能过滤器安装部，形成的集尘过滤器固定部 在用于固定集尘过滤器的高性能过滤器安装部分的一侧和形成在集尘过滤器固定部分的一侧上的排出口，用于排出已被吸入吸入口的空气。

公开(公告)号：US07687379B2

公开(公告)日：2010-03-30

申请号：US11966580

申请日：2007-12-28

申请人： Jin-Dong Song ,  Ju-Young Lim ,  Joonyeon Chang ,  Won Jun Choi

发明人： Jin-Dong Song ,  Ju-Young Lim ,  Joonyeon Chang ,  Won Jun Choi

IPC分类号： H01L21/20 ,  H01L21/36 ,  H01L31/00 ,  H01L31/20

CPC分类号： H01L29/127 ,  B82Y10/00 ,  H01L21/0237 ,  H01L21/02395 ,  H01L21/02439 ,  H01L21/02463 ,  H01L21/02502 ,  H01L21/02513 ,  H01L21/02546 ,  H01L21/02549 ,  H01L21/02631 ,  H01L29/205

摘要： Disclosed is a method of manufacturing a semiconductor device whereby InAs(1-x)Sbx semiconductor layer is formed on an easily available and economical semiconductor substrate such as a GaAs substrate or a Si substrate. According to the method, a quantum dot layer is formed between a semiconductor substrate and a semiconductor layer to reduce defects caused by lattice mismatch between the semiconductor layer and the semiconductor layer. The method may improve the growth speed of the semiconductor layer. In addition, because the InSb layer provided by the present invention has an electron mobility greater at room temperature, it may improve the quality and productivity of the semiconductor device.

摘要翻译： 公开了一种制造半导体器件的方法，其中InAs（1-x）Sbx半导体层形成在易于获得且经济的半导体衬底例如GaAs衬底或Si衬底上。 根据该方法，在半导体衬底和半导体层之间形成量子点层，以减少由半导体层和半导体层之间的晶格失配引起的缺陷。 该方法可以提高半导体层的生长速度。 此外，由于本发明提供的InSb层在室温下的电子迁移率更大，所以可以提高半导体器件的质量和生产率。