Abstract:
An acousto-optic device includes an acousto-optic medium having a multi-layer nanostructure; and a sonic wave generator configured to apply sonic waves to the acousto-optic medium having the multi-layer nanostructure. The acousto-optic medium having the multi-layer nanostructure includes a second layer formed of at least two materials that have different dielectric constants and alternate with each other; and a first layer disposed on a first surface of the second layer and formed of a first material, and/or a third layer disposed on a second surface of the second layer and formed of a fourth material.
Abstract:
Provided are a transistor, a method of manufacturing the transistor, and an electronic device including the transistor. The transistor may include a passivation layer on a channel layer, a source, a drain, and a gate, wherein the component of the passivation layer is varied in a height direction. The passivation layer may have a multi-layer structure including a silicon oxide layer, a silicon oxynitride layer, and a silicon nitride layer sequentially stacked. The channel layer may include an oxide semiconductor.
Abstract:
A foldable display includes a first plate, a second plate, a first protecting window, a second protecting window, a soft material layer and an intermediate layer which controls brightness. The first plate includes a thin film transistor and an organic light emitting diode (“OLED”), and displays at least one portion of an image to be displayed. The second plate includes a thin film transistor and an OLED, and displays a second portion different from the first portion of the image. The first protecting window is on the first plate. The second protecting window is on the second plate. The soft material layer is between the first and second protecting windows. The intermediate layer is between the soft material layer and a side surface of the first protecting window, and between the soft material layer and the second protecting window.
Abstract:
A transistor may include a channel layer formed of an oxide semiconductor. The oxide semiconductor may include GaZnON, and a proportion of Ga content to a total content of Ga and Zn of the channel layer is about 0.5 to about 4.5 at %.
Abstract:
Thin film transistors (TFTs) and methods of manufacturing the same. A TFT may include a floating channel on a surface of a channel and spaced apart from a source and a drain, and an insulating layer formed on the floating channel and designed to determine a distance between the floating channel and the source or the drain.
Abstract:
Provided are an oxide semiconductor and an oxide thin film transistor including the oxide semiconductor. The oxide semiconductor may be formed of an indium (In)-zinc (Zn) oxide in which hafnium (Hf) is contained, wherein In, Zn, and Hf are contained in predetermined or given composition ratios.
Abstract:
A method of preparing a thin film includes coating a thin film-forming composition on a substrate, and heat-treating the coated thin film-forming composition under a pressure less than 760 Torr. The thin film includes a compact layer having a thickness in a range of greater than 50 Å to about 20,000 Å and a refractive index in a range of about 1.85 to about 2.0.
Abstract:
An example embodiment relates to a transistor including a channel layer. A channel layer of the transistor may include a plurality of unit layers spaced apart from each other in a vertical direction. Each of the unit layers may include a plurality of unit channels spaced apart from each other in a horizontal direction. The unit channels in each unit layer may form a stripe pattern. Each of the unit channels may include a plurality of nanostructures. Each nanostructure may have a nanotube or nanowire structure, for example a carbon nanotube (CNT).
Abstract:
Provided are a thin film transistor and a method of manufacturing the same. The thin film transistor includes: a lower structure; a semiconductor layer formed on the lower structure and including a plurality of doping regions; a first insulating layer and a second insulating layer formed on the semiconductor layer and separated from each other; a third insulating layer formed on the first insulating layer and the second insulating layer; and a gate electrode layer formed between regions of the third insulating layer respectively corresponding to the first insulating layer and the second insulating layer.
Abstract:
Provided is a method of manufacturing a ZnO-based thin film transistor (TFT). The method may include forming source and drain electrodes using one or two wet etchings. A tin (Sn) oxide, a fluoride, or a chloride having relatively stable bonding energy against plasma may be included in a channel layer. Because the source and drain electrodes are formed by wet etching, damage to the channel layer and an oxygen vacancy may be prevented or reduced. Because the material having higher bonding energy is distributed in the channel layer, damage to the channel layer occurring when a passivation layer is formed may be prevented or reduced.