Flash Memory Data Correction and Scrub Techniques
    2.
    发明申请
    Flash Memory Data Correction and Scrub Techniques 有权
    闪存数据校正和擦写技术

    公开(公告)号:US20070211532A1

    公开(公告)日:2007-09-13

    申请号:US11748077

    申请日:2007-05-14

    IPC分类号: G11C11/34

    摘要: In order to maintain the integrity of data stored in a flash memory that are susceptible to being disturbed by operations in adjacent regions of the memory, disturb events cause the data to be read, corrected and re-written before becoming so corrupted that valid data cannot be recovered. The sometimes conflicting needs to maintain data integrity and system performance are balanced by deferring execution of some of the corrective action when the memory system has other high priority operations to perform. In a memory system utilizing very large units of erase, the corrective process is executed in a manner that is consistent with efficiently rewriting an amount of data much less than the capacity of a unit of erase.

    摘要翻译: 为了保持存储在闪速存储器中的数据的完整性,其易于被存储器的相邻区域中的操作干扰,干扰事件导致在变得如此损坏之前读取,校正和重新写入数据,使得有效数据不能 被收回。 当存储器系统具有执行其他高优先级操作时,通过推迟执行某些纠正措施来平衡维护数据完整性和系统性能的有时冲突的需求。 在使用非常大的擦除单位的存储器系统中,以与有效地重写远远小于擦除单位的容量的数据量相一致的方式执行校正处理。

    Flash Controller Cache Architecture
    3.
    发明申请
    Flash Controller Cache Architecture 有权
    闪存控制器缓存架构

    公开(公告)号:US20070143545A1

    公开(公告)日:2007-06-21

    申请号:US11671394

    申请日:2007-02-05

    IPC分类号: G06F12/00 G06F13/28

    摘要: A buffer cache interposed between a non-volatile memory and a host may be partitioned into segments that may operate with different policies. Cache policies include write-through, write and read-look-ahead. Write-through and write back policies may improve speed. Read-look-ahead cache allows more efficient use of the bus between the buffer cache and non-volatile memory. A session command allows data to be maintained in volatile memory by guaranteeing against power loss.

    摘要翻译: 介于非易失性存储器和主机之间的缓冲器高速缓存可被划分成可以不同策略操作的段。 缓存策略包括直写,写入和预读。 直写和回写策略可能会提高速度。 预读高速缓存允许在缓冲器高速缓存和非易失性存储器之间更有效地使用总线。 会话命令允许通过保证防止功率损耗来将数据保存在易失性存储器中。

    Voice controlled portable memory storage device
    4.
    发明申请
    Voice controlled portable memory storage device 有权
    语音控制便携式存储设备

    公开(公告)号:US20070143533A1

    公开(公告)日:2007-06-21

    申请号:US11314933

    申请日:2005-12-21

    申请人: Kevin Conley

    发明人: Kevin Conley

    IPC分类号: G06F12/00 G06F13/28

    CPC分类号: G06F21/32

    摘要: Method for a portable memory storage device is provided. The method includes, enrolling the device after the device interfaces with a host system and an application is launched that requests a user to provide voice input; receiving the user voice input and storing the voice input as a template for subsequent user access; wherein the template is stored in non-volatile memory cells of the device; and authenticating a user by receiving user voice input and comparing the voice input with the stored template, wherein access to user files is provided after the user is authenticated.

    摘要翻译: 提供了一种用于便携式存储器存储装置的方法。 该方法包括:在设备与主机系统接口并启动请求用户提供语音输入的应用之后注册设备; 接收用户语音输入并存储语音输入作为后续用户访问的模板; 其中所述模板存储在所述设备的非易失性存储单元中; 以及通过接收用户语音输入并将语音输入与存储的模板进行比较来认证用户,其中在用户被认证之后提供对用户文件的访问。

    Retargetable memory cell redundancy methods
    5.
    发明申请
    Retargetable memory cell redundancy methods 有权
    可重定位的存储单元冗余方法

    公开(公告)号:US20070103977A1

    公开(公告)日:2007-05-10

    申请号:US11270198

    申请日:2005-11-08

    IPC分类号: G11C16/06

    摘要: In a memory array having redundant columns, a scheme allows defective cells to be individually remapped to redundant cells in a redundant column. Redundant cells in one redundant column replace defective cells in multiple non-redundant columns. Remapping is done as part of initial test and configuration. Specific hardware can be used for the scheme or firmware in the memory controller can implement the scheme.

    摘要翻译: 在具有冗余列的存储器阵列中,一种方案允许故障单元被单独地重新映射到冗余列中的冗余单元。 一个冗余列中的冗余单元格可以替换多个非冗余列中的有缺陷单元。 重新映射作为初始测试和配置的一部分完成。 具体硬件可用于方案或固件在内存控制器中可实现的方案。

    Off-chip data relocation
    6.
    发明申请
    Off-chip data relocation 有权
    片外数据迁移

    公开(公告)号:US20060136687A1

    公开(公告)日:2006-06-22

    申请号:US11022462

    申请日:2004-12-21

    IPC分类号: G06F12/16

    CPC分类号: G11C16/10 G11C16/26

    摘要: The on-chip copy process is extended so that the data may be copied between two blocks that may be on different chips, different planes on the same chip, or the same plane of the same chip. More specifically, the methods described here provide a single data copying mechanism that allows data to be copied between any two locations in a memory system. An exemplary embodiment uses an EDO-type timing. According to another aspect, selected portions of the relocated data, such as chosen words in a transferred page, can be updated in the controller on the fly. In addition to transferring a data set directly from a read buffer of a source array to a write buffer of a destination array, the data set can concurrently be copied, if desired, into the controller where an error detection and correction operation can be performed on it.

    摘要翻译: 片上复制处理被扩展,使得可以在可以在不同芯片上的两个块之间,同一芯片上的不同平面或同一芯片的同一平面上复制数据。 更具体地说,这里描述的方法提供了允许在存储器系统中的任何两个位置之间复制数据的单个数据复制机制。 示例性实施例使用EDO型定时。 根据另一方面,可以在控制器中即时更新重新定位的数据的所选部分,例如传送页面中的所选择的单词。 除了将数据集直接从源阵列的读缓冲器传送到目的地阵列的写缓冲器之外,如果需要,数据组可以同时复制到控制器中,其中可以执行错误检测和校正操作 它。

    Pipelined data relocation and improved chip architectures
    7.
    发明申请
    Pipelined data relocation and improved chip architectures 有权
    流水线数据迁移和改进的芯片架构

    公开(公告)号:US20050257120A1

    公开(公告)日:2005-11-17

    申请号:US10846289

    申请日:2004-05-13

    摘要: The present invention present methods and architectures for the pipelining of read operation with write operations. In particular, methods are presented for pipelining data relocation operations that allow for the checking and correction of data in the controller prior to its being re-written, but diminish or eliminate the additional time penalty this would normally incur. A number of architectural improve are described to facilitate these methods, including: introducing two registers on the memory where each is independently accessible by the controller; allowing a first memory register to be written from while a second register is written to; introducing two registers on the memory where the contents of the registers can be swapped.

    摘要翻译: 本发明提出了用于具有写入操作的读取操作的流水线的方法和架构。 特别地,提出了用于流水线数据迁移操作的方法,其允许在控制器被重写之前检查和校正控制器中的数据,但是减少或消除通常会产生的额外时间损失。 描述了许多架构改进以便于这些方法,包括:在存储器上引入两个寄存器,每个寄存器可由控制器独立访问; 允许在写入第二个寄存器时写入第一个存储器寄存器; 在存储器中引入两个寄存器,其中寄存器的内容可以交换。

    Pipelined parallel programming operation in a non-volatile memory system
    8.
    发明申请
    Pipelined parallel programming operation in a non-volatile memory system 有权
    在非易失性存储器系统中进行流水线并行编程操作

    公开(公告)号:US20050146939A1

    公开(公告)日:2005-07-07

    申请号:US11058359

    申请日:2005-02-14

    摘要: The present invention allows for an increase in programming parallelism in a non-volatile memory system without incurring additional data transfer latency. Data is transferred from a controller to a first memory chip and a programming operation is caused to begin. While that first memory chip is busy performing that program operation, data is transferred from the controller to a second memory chip and a programming operation is caused to begin in that chip. Data transfer can begin to the first memory chip again once it has completed its programming operation even though the second chip is still busy performing its program operation. In this manner high parallelism of programming operation is achieved without incurring the latency cost of performing the additional data transfers. Two sets of embodiments are presented, one that preserves the host data in a buffer until successful programming of that data is confirmed and one that does not require that success be achieved and that does not preserve the data thus achieving a higher rate of data programming throughput.

    摘要翻译: 本发明允许在非易失性存储器系统中增加编程并行性,而不会引起额外的数据传输等待时间。 数据从控制器传送到第一存储器芯片,并且开始编程操作。 当该第一存储器芯片正在忙于执行该程序操作时,数据从控制器传送到第二存储器芯片,并且使该编程操作在该芯片中开始。 一旦完成编程操作,即使第二个芯片仍在忙于执行其程序操作,数据传输也可以再次开始到第一个存储器芯片。 以这种方式,实现编程操作的高并行性,而不会导致执行附加数据传输的延迟成本。 呈现了两组实施例,一种将缓冲器中的主机数据保留,直到该数据的成功编程被确认为止,并且不需要实现该成功,并且不保留数据从而实现更高的数据编程吞吐量 。

    Flash Storage System with Write-Erase Abort Detection Mechanism
    9.
    发明申请
    Flash Storage System with Write-Erase Abort Detection Mechanism 有权
    闪存存储系统具有写擦除中止检测机制

    公开(公告)号:US20080065818A1

    公开(公告)日:2008-03-13

    申请号:US11936440

    申请日:2007-11-07

    IPC分类号: G06F12/00

    摘要: The present invention presents a non-volatile memory and method for its operation that ensures reliable mechanism for write and erase abort detection in the event of lost of power during non-volatile memory programming and erasing with minimized system performance penalty. During a multi-sector write process, an indication of a successful write in one sector is written into the overhead of the following sector at the same time as the following sector's data content is written. The last sector written will additionally have an indication of its own successful write written into its overhead. For erase, an erase abort flag in the first sector of the block can be marked after a successful erase operation.

    摘要翻译: 本发明提供了一种用于其操作的非易失性存储器和方法,其确保在非易失性存储器编程和擦除期间由于在最小化的系统性能损失下的擦除而导致的写入和擦除中止检测的可靠机制。 在多扇区写入过程中,在写入下一个扇区的数据内容的同时,在一个扇区中成功写入的指示被写入下一个扇区的开销。 写入的最后一个部分将另外显示自己的成功写入写入其开销。 为了擦除,可以在成功擦除操作之后标记块的第一个扇区中的擦除中止标志。

    Portable media encoder with remote session management interface
    10.
    发明申请
    Portable media encoder with remote session management interface 审中-公开
    便携式媒体编码器,具有远程会话管理界面

    公开(公告)号:US20070180166A1

    公开(公告)日:2007-08-02

    申请号:US11399093

    申请日:2006-04-06

    IPC分类号: G06F13/38

    CPC分类号: H05K7/1411 H05K7/1439

    摘要: A portable media encoder is disclosed. A portable media encoder includes a a video input port configured to receive a video input from a video source, an audio input port configured to receive an audio input from an audio source, and a digital output port for providing a digital output stream corresponding to the received video input and audio input. An encoding processor that converts the video input and the audio input into a streamable digital output format for transmitting through the digital output port is provided. A digital control input port for receiving commands from a remote management console and providing the commands to the encoding processor is also provided. A housing enclosed the encoding processor and provides at least one access panel facilitating user access to the video input port, the audio input port, the digital output port, and the digital control input port. The housing has a size and configuration that allows the encoder to be hand carried by a single individual

    摘要翻译: 公开了便携式媒体编码器。 便携式媒体编码器包括被配置为从视频源接收视频输入的视频输入端口,被配置为从音频源接收音频输入的音频输入端口以及用于提供对应于接收到的数字输出流的数字输出端口 视频输入和音频输入。 提供了一种编码处理器,其将视频输入和音频输入转换成可流式数字输出格式,以通过数字输出端口传输。 还提供了用于从远程管理控制台接收命令并向编码处理器提供命令的数字控制输入端口。 壳体包围编码处理器并提供至少一个访问面板,便于用户访问视频输入端口,音频输入端口,数字输出端口和数字控制输入端口。 外壳具有允许编码器由单个人手持的尺寸和构造