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公开(公告)号：US08347141B2
公开(公告)日：2013-01-01
申请号：US13086636
申请日：2011-04-14
IPC分类号： G06F11/00
CPC分类号： G06F12/0804 , G06F11/1471 , G06F12/0866 , G06F2201/82
摘要： A volatile or nonvolatile cache memory can cache mass storage device read data and write data. The cache memory may become inaccessible, and I/O operations may go directly to the mass storage device, bypassing the cache memory. A log of write operations may be maintained to update the cache memory when it becomes available.
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2.发明申请METHOD AND APPARATUS TO MAINTAIN DATA INTEGRITY IN DISK CACHE MEMORY DURING AND AFTER PERIODS OF CACHE INACCESSIBILITY 有权在高速缓存不可靠期间和之后的盘存储器中保持数据完整性的方法和装置公开(公告)号：US20110283139A1
公开(公告)日：2011-11-17
申请号：US13086636
申请日：2011-04-14
IPC分类号： G06F11/00
CPC分类号： G06F12/0804 , G06F11/1471 , G06F12/0866 , G06F2201/82
摘要： A volatile or nonvolatile cache memory can cache mass storage device read data and write data. The cache memory may become inaccessible, and I/O operations may go directly to the mass storage device, bypassing the cache memory. A log of write operations may be maintained to update the cache memory when it becomes available.
摘要翻译： 易失性或非易失性缓存存储器可以缓存大容量存储设备读取数据并写入数据。 高速缓冲存储器可能变得不可访问，并且I / O操作可能会绕过高速缓冲存储器直接进入大容量存储设备。 可以维护写入操作的日志，以在高速缓存存储器可用时更新缓冲存储器。
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3.发明申请METHOD AND APPARATUS TO MAINTAIN DATA INTEGRITY IN DISK CACHE MEMORY DURING AND AFTER PERIODS OF CACHE INACCESSIBILITY 有权在高速缓存不可靠期间和之后的盘存储器中保持数据完整性的方法和装置公开(公告)号：US20090077313A1
公开(公告)日：2009-03-19
申请号：US12272906
申请日：2008-11-18
IPC分类号： G06F12/08 , G06F1/32 , G06F15/177
CPC分类号： G06F12/0804 , G06F11/1471 , G06F12/0866 , G06F2201/82
摘要： A volatile or nonvolatile cache memory can cache mass storage device read data and write data. The cache memory may become inaccessible, and I/O operations may go directly to the mass storage device, bypassing the cache memory. A log of write operations may be maintained to update the cache memory when it becomes available.
摘要翻译： 易失性或非易失性缓存存储器可以缓存大容量存储设备读取数据并写入数据。 高速缓冲存储器可能变得不可访问，并且I / O操作可能会绕过高速缓冲存储器直接进入大容量存储设备。 可以维护写入操作的日志，以在高速缓存存储器可用时更新缓冲存储器。
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4.发明授权Method and apparatus to maintain data integrity in disk cache memory during and after periods of cache inaccessibility 有权在高速缓存不可访问期间和之后，在磁盘高速缓冲存储器中保持数据完整性的方法和装置公开(公告)号：US07627713B2
公开(公告)日：2009-12-01
申请号：US11321434
申请日：2005-12-29
IPC分类号： G06F12/00
CPC分类号： G06F12/0804 , G06F11/1471 , G06F12/0866 , G06F2201/82
摘要： A volatile or nonvolatile cache memory can cache mass storage device read data and write data. The cache memory may become inaccessible, and I/O operations may go directly to the mass storage device, bypassing the cache memory. A log of write operations may be maintained to update the cache memory when it becomes available.
摘要翻译： 易失性或非易失性缓存存储器可以缓存大容量存储设备读取数据并写入数据。 高速缓冲存储器可能变得不可访问，并且I / O操作可能会绕过高速缓冲存储器直接进入大容量存储设备。 可以维护写入操作的日志，以在高速缓存存储器可用时更新缓冲存储器。
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5.发明授权Method and apparatus to maintain data integrity in disk cache memory during and after periods of cache inaccessibility 有权在高速缓存不可访问期间和之后，在磁盘高速缓冲存储器中保持数据完整性的方法和装置公开(公告)号：US07962785B2
公开(公告)日：2011-06-14
申请号：US12272906
申请日：2008-11-18
IPC分类号： G06F11/00
CPC分类号： G06F12/0804 , G06F11/1471 , G06F12/0866 , G06F2201/82
摘要： A volatile or nonvolatile cache memory can cache mass storage device read data and write data. The cache memory may become inaccessible, and I/O operations may go directly to the mass storage device, bypassing the cache memory. A log of write operations may be maintained to update the cache memory when it becomes available.
摘要翻译： 易失性或非易失性缓存存储器可以缓存大容量存储设备读取数据并写入数据。 高速缓冲存储器可能变得不可访问，并且I / O操作可能会绕过高速缓冲存储器直接进入大容量存储设备。 可以维护写入操作的日志，以在高速缓存存储器可用时更新缓冲存储器。
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6.发明申请Techniques for Adaptive Demand/Response Energy Management of Electronic Systems 审中-公开电子系统自适应需求/响应能量管理技术公开(公告)号：US20150005974A1
公开(公告)日：2015-01-01
申请号：US13931442
申请日：2013-06-28
IPC分类号： G05F1/66
CPC分类号： H02J13/0079 , H02J3/38 , Y02E40/72 , Y04S10/12
摘要： Techniques for adaptive demand/response power management. Power consumption and battery charge level of a platform having a battery with a smart power module are monitored. Information indicating the power consumption and battery charge level for the platform is provided to a remote demand/response management device. The remote demand/response management device and the smart power module receive a command to modify one or more power consumption characteristics of the platform. The one or more power consumption characteristics of the platform are to be changed in response to the command.
摘要翻译： 自适应需求/响应电源管理技术。 监视具有智能电源模块的电池的平台的功耗和电池充电量。 向远程需求/响应管理装置提供表示该平台的功率消耗和电池充电量的信息。 远程需求/响应管理设备和智能功率模块接收到修改平台的一个或多个功耗特性的命令。 响应于该命令，平台的一个或多个功耗特性将被改变。
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7.发明申请公开(公告)号：US20120159201A1
公开(公告)日：2012-06-21
申请号：US13118183
申请日：2011-05-27
申请人： Eric Distefano , Guy M. Therien , Vasudevan Srinivasan , Tawfik Rahal-Arabi , Venkatesh Ramani , Ryan D. Wells , Steven H. Gunther , Jeremy Shrall , James Hermerding, II
发明人： Eric Distefano , Guy M. Therien , Vasudevan Srinivasan , Tawfik Rahal-Arabi , Venkatesh Ramani , Ryan D. Wells , Steven H. Gunther , Jeremy Shrall , James Hermerding, II
IPC分类号： G06F1/26
CPC分类号： G06F1/3234 , G06F1/206 , G06F1/26 , Y02D10/16
摘要： A technique to change a thermal design power (TDP) value. In one embodiment, one or more environmental or user-driven changes may cause a processor's TDP value to be changed. Furthermore, in some embodiments a change in TDP may alter a turbo mode target frequency.
摘要翻译： 一种改变热设计功耗（TDP）值的技术。 在一个实施例中，一个或多个环境或用户驱动的改变可以导致处理器的TDP值被改变。 此外，在一些实施例中，TDP的改变可以改变涡轮模式目标频率。
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8.发明授权公开(公告)号：US07689838B2
公开(公告)日：2010-03-30
申请号：US11316541
申请日：2005-12-22
申请人： Vasudevan Srinivasan , Susumu Arai , Barnes Cooper
发明人： Vasudevan Srinivasan , Susumu Arai , Barnes Cooper
IPC分类号： G06F1/00
CPC分类号： G06F1/3203 , G06F1/329 , G06F9/4818 , G06F11/3423 , G06F11/3466 , Y02D10/24
摘要： In some embodiments, the method and apparatus to provide for the detection of processor transition states is described. Some embodiments include at least two threads which provide detection for high and low priority states, which provide for power state transitions by the operating system: The low priority thread runs just prior to entry into an idle or low power state; the high priority thread runs when the idle state is ended or the highest power state is reached. In some embodiments, the use of these threads provides for the detection of processor state transitions and idle times independently of the operating system. Other embodiments are described.
摘要翻译： 在一些实施例中，描述了提供用于检测处理器转换状态的方法和装置。 一些实施例包括提供针对高优先级和低优先级状态的检测的至少两个线程，其提供操作系统的功率状态转换：低优先级线程在进入空闲或低功率状态之前运行; 高优先级线程在空闲状态结束或达到最高功率状态时运行。 在一些实施例中，这些线程的使用提供独立于操作系统的处理器状态转换和空闲时间的检测。 描述其他实施例。
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公开(公告)号：US20210103662A1
公开(公告)日：2021-04-08
申请号：US17127122
申请日：2020-12-18
申请人： Chinmay Ashok , Vasudevan Srinivasan , Atanas K. Iwanow , Martin G. Dixon , Scott J. Cape , Scott Bobholz , David T. Mayo , Vinila Rose , Lorie Wigle , Jason Kennedy
发明人： Chinmay Ashok , Vasudevan Srinivasan , Atanas K. Iwanow , Martin G. Dixon , Scott J. Cape , Scott Bobholz , David T. Mayo , Vinila Rose , Lorie Wigle , Jason Kennedy
摘要： Methods and apparatus for restricted deployment of targeted processor firmware updates. During a patch enabling per-work flow, service entitlement license information comprising one of more service entitlements is generated and provisioned on one or more computing platforms. A restricted deployment microcode (uCode) update release (aka uCode patch) targeted for platforms having CPUs and/or XPUs with certain part identifier is sent to the one or more platforms. Run-time software and/or firmware on the platforms are executed to access the provisioned service entitlement license information, which is used to authentic and verify the restricted deployment uCode update release using a service entitlement having a part identifier associated with the platform's CPU. In one solution, authentication is performed using a hash-matching scheme and verification is used to verify the platform is properly licensed to load uCode included in the restricted deployment microcode (uCode) update release into the CPU.
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公开(公告)号：US09152473B2
公开(公告)日：2015-10-06
申请号：US13730926
申请日：2012-12-29
CPC分类号： G06F9/5094 , G06F1/206 , G06F1/3234 , Y02D10/16 , Y02D10/22
摘要： Methods and apparatus relating to table driven multiple passive trip, platform passive thermal management are described. In one embodiment, the power consumption limit of one or more components of a platform is modified based on one or more thermal relationships between one or more power consuming components of the platform and one or more heat generating components of the platform. Furthermore, a first relationship of the one or more thermal relationships indicates a mapping between a plurality of temperature thresholds and a corresponding plurality of performance limits. Other embodiments are also claimed and disclosed.
摘要翻译： 描述了与桌面驱动多被动跳闸，平台被动热管理有关的方法和设备。 在一个实施例中，基于平台的一个或多个功耗部件与平台的一个或多个发热部件之间的一个或多个热关系来修改平台的一个或多个部件的功耗限制。 此外，一个或多个热关系的第一关系表示多个温度阈值与对应的多个性能极限之间的映射。 还要求和公开其它实施例。
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