Passivation of wide band-gap based semiconductor devices with hydrogen-free sputtered nitrides
    1.
    发明申请
    Passivation of wide band-gap based semiconductor devices with hydrogen-free sputtered nitrides 有权
    使用无氢溅射氮化物钝化宽带隙基半导体器件

    公开(公告)号:US20070001174A1

    公开(公告)日:2007-01-04

    申请号:US11169378

    申请日:2005-06-29

    IPC分类号: H01L29/15 H01L31/0256

    摘要: A passivated semiconductor structure and associated method are disclosed. The structure includes a silicon carbide substrate or layer; an oxidation layer on the silicon carbide substrate for lowering the interface density between the silicon carbide substrate and the thermal oxidation layer; a first sputtered non-stoichiometric silicon nitride layer on the thermal oxidation layer for reducing parasitic capacitance and minimizing device trapping; a second sputtered non-stoichiometric silicon nitride layer on the first layer for positioning subsequent passivation layers further from the substrate without encapsulating the structure; a sputtered stoichiometric silicon nitride layer on the second sputtered layer for encapsulating the structure and for enhancing the hydrogen barrier properties of the passivation layers; and a chemical vapor deposited environmental barrier layer of stoichiometric silicon nitride for step coverage and crack prevention on the encapsulant layer.

    摘要翻译: 公开了钝化的半导体结构和相关方法。 该结构包括碳化硅衬底或层; 在碳化硅衬底上的氧化层,用于降低碳化硅衬底和热氧化层之间的界面密度; 在热氧化层上的第一溅射的非化学计量的氮化硅层,用于减少寄生电容并最小化器件捕获; 在所述第一层上的第二溅射的非化学计量的氮化硅层,用于使所述衬底进一步从所述衬底定位以后的钝化层而不封装所述结构; 在第二溅射层上溅射化学计量的氮化硅层,用于封装该结构并增强钝化层的氢阻挡性能; 以及化学气相沉积的化学计量氮化硅的环境阻挡层,用于在封装层上进行步骤覆盖和防裂。

    Nitride-based transistors with a protective layer and a low-damage recess
    2.
    发明申请
    Nitride-based transistors with a protective layer and a low-damage recess 有权
    具有保护层和低损伤凹陷的氮化物基晶体管

    公开(公告)号:US20060255366A1

    公开(公告)日:2006-11-16

    申请号:US11358241

    申请日:2006-02-21

    IPC分类号: H01L29/739

    摘要: Transistors are fabricated by forming a nitride-based semiconductor barrier layer on a nitride-based semiconductor channel layer and forming a protective layer on a gate region of the nitride-based semiconductor barrier layer. Patterned ohmic contact metal regions are formed on the barrier layer and annealed to provide first and second ohmic contacts. The annealing is carried out with the protective layer on the gate region. A gate contact is also formed on the gate region of the barrier layer. Transistors having protective layer in the gate region are also provided as are transistors having a barrier layer with a sheet resistance substantially the same as an as-grown sheet resistance of the barrier layer.

    摘要翻译: 晶体管通过在氮化物基半导体沟道层上形成氮化物基半导体势垒层并在氮化物基半导体势垒层的栅极区上形成保护层来制造晶体管。 图案化的欧姆接触金属区形成在阻挡层上并退火以提供第一和第二欧姆接触。 退火是在栅极区域上的保护层进行的。 栅极接触也形成在阻挡层的栅极区上。 还提供了在栅极区域中具有保护层的晶体管,就像具有阻挡层的晶体管一样,薄膜电阻基本上与阻挡层的片状电阻基本相同。

    Nitride-based transistors with a protective layer and a low-damage recess and methods of fabrication thereof
    4.
    发明申请
    Nitride-based transistors with a protective layer and a low-damage recess and methods of fabrication thereof 有权
    具有保护层和低损伤凹陷的氮化物基晶体管及其制造方法

    公开(公告)号:US20050170574A1

    公开(公告)日:2005-08-04

    申请号:US10758871

    申请日:2004-01-16

    摘要: Transistors are fabricated by forming a nitride-based semiconductor barrier layer on a nitride-based semiconductor channel layer and forming a protective layer on a gate region of the nitride-based semiconductor barrier layer. Patterned ohmic contact metal regions are formed on the barrier layer and annealed to provide first and second ohmic contacts. The annealing is carried out with the protective layer on the gate region. A gate contact is also formed on the gate region of the barrier layer. Transistors having protective layer in the gate region are also provided as are transistors having a barrier layer with a sheet resistance substantially the same as an as-grown sheet resistance of the barrier layer.

    摘要翻译: 晶体管通过在氮化物基半导体沟道层上形成氮化物基半导体势垒层并在氮化物基半导体势垒层的栅极区上形成保护层来制造晶体管。 图案化的欧姆接触金属区形成在阻挡层上并退火以提供第一和第二欧姆接触。 退火是在栅极区域上的保护层进行的。 栅极接触也形成在阻挡层的栅极区上。 还提供了在栅极区域中具有保护层的晶体管,就像具有阻挡层的晶体管一样,薄膜电阻基本上与阻挡层的片状电阻基本相同。

    Thick semi-insulating or insulating epitaxial gallium nitride layers and devices incorporating same
    5.
    发明申请
    Thick semi-insulating or insulating epitaxial gallium nitride layers and devices incorporating same 有权
    厚半绝缘或绝缘外延氮化镓层和结合其的器件

    公开(公告)号:US20060226412A1

    公开(公告)日:2006-10-12

    申请号:US11103117

    申请日:2005-04-11

    IPC分类号: H01L29/06

    摘要: Semiconductor device structures and methods of fabricating semiconductor devices structures are provided that include a semi-insulating or insulating GaN epitaxial layer on a conductive semiconductor substrate and/or a conductive layer. The semi-insulating or insulating GaN epitaxial layer has a thickness of at least about 4 μm. GaN semiconductor device structures and methods of fabricating GaN semiconductor device structures are also provided that include an electrically conductive SiC substrate and an insulating or semi-insulating GaN epitaxial layer on the conductive SiC substrate. The GaN epitaxial layer has a thickness of at least about 4 μm. GaN semiconductor device structures and methods of fabricating GaN semiconductor device structures are also provided that include an electrically conductive GaN substrate, an insulating or semi-insulating GaN epitaxial layer on the conductive GaN substrate, a GaN based semiconductor device on the GaN epitaxial layer and a via hole and corresponding via metal in the via hole that extends through layers of the GaN based semiconductor device and the GaN epitaxial layer.

    摘要翻译: 提供半导体器件结构和制造半导体器件结构的方法,其包括在导电半导体衬底和/或导电层上的半绝缘或绝缘GaN外延层。 半绝缘或绝缘GaN外延层具有至少约4μm的厚度。 还提供GaN半导体器件结构和制造GaN半导体器件结构的方法,其包括在导电SiC衬底上的导电SiC衬底和绝缘或半绝缘GaN外延层。 GaN外延层具有至少约4μm的厚度。 还提供GaN半导体器件结构和制造GaN半导体器件结构的方法,其包括导电GaN衬底,导电GaN衬底上的绝缘或半绝缘GaN外延层,GaN外延层上的GaN基半导体器件和 通孔和通孔中相应的通孔金属延伸穿过GaN基半导体器件和GaN外延层的层。

    Nitride-based transistors having laterally grown active region and methods of fabricating same

    公开(公告)号:US20060017064A1

    公开(公告)日:2006-01-26

    申请号:US10899215

    申请日:2004-07-26

    IPC分类号: H01L29/739

    摘要: High electron mobility transistors and/or methods of fabricating high electron mobility transistors that include a first Group III-nitride layer having vertically grown regions, laterally grown regions and a coalescence region are provided. A Group III-nitride channel layer is provided on the first Group III-nitride layer and a Group III-nitride barrier layer is provided on the Group III-nitride channel layer. A drain contact, a source contact and a gate contact are provided on the barrier layer. The gate contact is disposed on a portion of the barrier layer on a laterally grown region of the first Group III-nitride layer and at least a portion of one of the source contact and/or the drain contact is disposed on a portion of the barrier layer on a vertically grown region of the first Group III-nitride layer.

    Methods of fabricating nitride-based transistors with a cap layer and a recessed gate
    7.
    发明申请
    Methods of fabricating nitride-based transistors with a cap layer and a recessed gate 有权
    制造具有盖层和凹入栅极的基于氮化物的晶体管的方法

    公开(公告)号:US20060019435A1

    公开(公告)日:2006-01-26

    申请号:US10897726

    申请日:2004-07-23

    IPC分类号: H01L21/338

    摘要: An anneal of a gate recess prior to formation of a gate contact, such as a Schottky contact, may reduce gate leakage and/or provide a high quality gate contact in a semiconductor device, such as a transistor. The use of an encapsulation layer during the anneal may further reduce damage to the semiconductor in the gate recess of the transistor. The anneal may be provided, for example, by an anneal of ohmic contacts of the device. Thus, high quality gate and ohmic contacts may be provided with reduced degradation of the gate region that may result from providing a recessed gate structure as a result of etch damage in forming the recess.

    摘要翻译: 在形成诸如肖特基接触之类的栅极接触之前的栅极凹槽的退火可以减少栅极泄漏和/或在诸如晶体管的半导体器件中提供高质量的栅极接触。 在退火期间使用封装层可以进一步降低对晶体管的栅极凹槽中的半导体的损坏。 退火可以例如通过器件的欧姆接触的退火来提供。 因此,可以提供高质量的栅极和欧姆接触,由于在形成凹槽时由于蚀刻损伤而提供凹陷的栅极结构可能导致栅极区域的降低。

    Dielectric passivation for semiconductor devices
    8.
    发明申请
    Dielectric passivation for semiconductor devices 有权
    半导体器件的介质钝化

    公开(公告)号:US20050258431A1

    公开(公告)日:2005-11-24

    申请号:US10851507

    申请日:2004-05-22

    摘要: A semiconductor device is disclosed that includes a layer of Group III nitride semiconductor material that includes at least one surface, a control contact on the surface for controlling the electrical response of the semiconductor material, a dielectric barrier layer covering at least a portion of the one surface adjacent the control contact, the dielectric barrier layer having a bandgap greater than the bandgap of the Group III nitride and a conduction band offset from the conduction band of the Group III nitride; and a dielectric protective layer covering the remainder of the Group III nitride surface.

    摘要翻译: 公开了一种半导体器件,其包括III族氮化物半导体材料层,其包括至少一个表面,用于控制半导体材料的电响应的表面上的控制触点,覆盖该半导体材料的至少一部分的电介质阻挡层 表面邻近控制触点,电介质阻挡层的带隙大于III族氮化物的带隙,导带偏离第III族氮化物的导带; 以及覆盖III族氮化物表面的其余部分的介电保护层。

    Cap layers and/or passivation layers for nitride-based transistors, transistor structures and methods of fabricating same
    10.
    发明申请
    Cap layers and/or passivation layers for nitride-based transistors, transistor structures and methods of fabricating same 有权
    用于氮化物基晶体管的盖层和/或钝化层,晶体管结构及其制造方法

    公开(公告)号:US20060108606A1

    公开(公告)日:2006-05-25

    申请号:US10996249

    申请日:2004-11-23

    IPC分类号: H01L31/109

    摘要: High electron mobility transistors are provided that include a non-uniform aluminum concentration AlGaN based cap layer having a high aluminum concentration adjacent a surface of the cap layer that is remote from the barrier layer on which the cap layer is provided. High electron mobility transistors are provided that include a cap layer having a doped region adjacent a surface of the cap layer that is remote from the barrier layer on which the cap layer is provided. Graphitic BN passivation structures for wide bandgap semiconductor devices are provided. SiC passivation structures for Group III-nitride semiconductor devices are provided. Oxygen anneals of passivation structures are also provided. Ohmic contacts without a recess are also provided.

    摘要翻译: 提供了高电子迁移率晶体管,其包括与盖层的表面相邻的具有高铝浓度的不均匀的铝浓度的AlGaN基覆盖层,其远离设置有盖层的阻挡层。 提供了高电子迁移率晶体管,其包括具有邻近盖层的表面的掺杂区域的帽层,其远离其上设置盖层的阻挡层。 提供了宽带隙半导体器件的石墨BN钝化结构。 提供了III族氮化物半导体器件的SiC钝化结构。 还提供了钝化结构的氧气退火。 还提供了没有凹槽的欧姆接触。