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8 条记录 (耗时 0.016 秒)

    COMMON ELECTRODE PANEL AND METHOD FOR MANUFACTURING THE SAME
    1.
    发明申请
    COMMON ELECTRODE PANEL AND METHOD FOR MANUFACTURING THE SAME 审中-公开
    普通电极面板及其制造方法

    公开(公告)号：US20120086900A1

    公开(公告)日：2012-04-12

    申请号：US13010712

    申请日：2011-01-20

    申请人： Se-Hwan YU ,  Sang-Ki Kwak

    发明人： Se-Hwan YU ,  Sang-Ki Kwak

    IPC分类号： G02F1/1343 ,  H01J9/26 ,  H01J9/00

    CPC分类号： G02F1/133351 ,  G02F1/1341 ,  G02F1/1345 ,  G02F2001/133354

    摘要： A manufacturing method of a liquid crystal display according to an exemplary embodiment includes: forming a thin film transistor array panel including a fan-out region connecting a display area and a peripheral area; forming a common electrode on a substrate; forming a cutout in the common electrode by using a laser; forming a common electrode panel by cutting the substrate; and assembling the thin film transistor array panel and the common electrode panel, wherein the cutout is formed on the edge of the common electrode panel and a portion of the cutout is positioned on the portion corresponding to the fan-out region.

    摘要翻译： 根据示例性实施例的液晶显示器的制造方法包括：形成包括连接显示区域和周边区域的扇出区域的薄膜晶体管阵列面板; 在基板上形成公共电极; 通过使用激光在公共电极上形成切口; 通过切割基板形成公共电极板; 以及组装所述薄膜晶体管阵列面板和所述公共电极面板，其中，所述切口形成在所述公共电极面板的边缘上，并且所述切口的一部分位于与所述扇出区域对应的部分上。

    THIN FILM TRANSISTOR SUBSTRATE
    2.
    发明申请
    THIN FILM TRANSISTOR SUBSTRATE 有权
    薄膜晶体管基板

    公开(公告)号：US20110025968A1

    公开(公告)日：2011-02-03

    申请号：US12816591

    申请日：2010-06-16

    申请人： Se-Hwan YU ,  Hyang-Shik Kong ,  Su-Hyoung Kang

    发明人： Se-Hwan YU ,  Hyang-Shik Kong ,  Su-Hyoung Kang

    IPC分类号： G02F1/1343

    CPC分类号： G02F1/136286 ,  G02F2001/13629

    摘要： A thin film transistor array panel including a display area having a gate line, a data line insulated from and intersecting the gate line, a thin film transistor connected to the gate line and the data line, and a pixel electrode connected to the thin film transistor, and a peripheral area formed on the circumference of the display area, according to an exemplary embodiment of the present invention, includes: a driving signal line formed with the same layer as the gate line in the peripheral area and receiving an external signal; a connection signal line formed with the same layer as the data line in the peripheral area; a disconnection prevention member overlapping the side surface of the connection signal line on the connection signal line; and a connection assistance member formed on the disconnection prevention member and connecting the driving signal line and the connection signal line.

    摘要翻译： 一种薄膜晶体管阵列面板，包括具有栅极线的显示区域，与栅极线绝缘并与之相交的数据线，连接到栅极线和数据线的薄膜晶体管，以及连接到薄膜晶体管的像素电极 以及形成在显示区域的圆周上的周边区域，根据本发明的示例性实施例，包括：形成与周边区域中的栅极线相同层并且接收外部信号的驱动信号线; 连接信号线，其与周边区域中的数据线形成相同的层; 断开防止部件与连接信号线上的连接信号线的侧面重叠; 以及连接辅助构件，其形成在所述防止断开构件上并且连接所述驱动信号线和所述连接信号线。

    LENTICULAR UNIT FOR TWO-DIMENSIONAL/THREE-DIMENSIONAL AUTO-STEREOSCOPIC DISPLAY
    4.
    发明申请
    LENTICULAR UNIT FOR TWO-DIMENSIONAL/THREE-DIMENSIONAL AUTO-STEREOSCOPIC DISPLAY 有权
    二维/三维自动立体显示器的单元

    公开(公告)号：US20120250151A1

    公开(公告)日：2012-10-04

    申请号：US13434487

    申请日：2012-03-29

    申请人： Yong-Su LEE ,  Yoon-Ho KHANG ,  Se-Hwan YU

    发明人： Yong-Su LEE ,  Yoon-Ho KHANG ,  Se-Hwan YU

    IPC分类号： G02B27/22 ,  G02B3/00 ,  G02B27/12

    CPC分类号： G02B27/2214 ,  H04N13/305 ,  H04N13/356

    摘要： A lenticular unit includes a transparent substrate; first electrodes being transparent and disposed on the substrate; a second electrode being transparent and elastic; and a transparent material layer interposed between the first and second electrodes and being deformable in a lens shape in a thickness direction depending on a potential applied between the first and second electrodes.

    摘要翻译： 透镜单元包括透明基板; 第一电极是透明的并且设置在基板上; 透明和弹性的第二电极; 以及插入在第一和第二电极之间并且可以根据施加在第一和第二电极之间的电位在厚度方向上变形为透镜形状的透明材料层。

    METHOD OF FORMING A FINE PATTERN, DISPLAY SUBSTRATE, AND METHOD OF MANUFACTURING THE SAME USING THE METHOD OF FORMING A FINE PATTERN
    5.
    发明申请
    METHOD OF FORMING A FINE PATTERN, DISPLAY SUBSTRATE, AND METHOD OF MANUFACTURING THE SAME USING THE METHOD OF FORMING A FINE PATTERN 有权
    形成精细图案的方法，显示基板及其使用形成精细图案的方法制造相同方法

    公开(公告)号：US20120248442A1

    公开(公告)日：2012-10-04

    申请号：US13349487

    申请日：2012-01-12

    申请人： Se-Hwan YU ,  Chong-Sup Chang ,  Sang-Ho Park ,  Ji-Seon Lee

    发明人： Se-Hwan YU ,  Chong-Sup Chang ,  Sang-Ho Park ,  Ji-Seon Lee

    IPC分类号： H01L29/04 ,  H01L21/312 ,  H01L21/02

    CPC分类号： H01L27/1218 ,  G02B5/3025 ,  G02F1/133528 ,  H01L27/1262

    摘要： A method is provided for forming a fine pattern. In the method, a first fine pattern and a first metal pattern are formed by respectively patterning a first fine pattern layer on a base substrate and a first metal layer on the first fine pattern layer. A second fine pattern layer and a second metal layer are sequentially formed over the first fine pattern and the first metal pattern. The second metal layer is patterned, so that a second metal pattern between adjacent portions of the first fine pattern. The second fine pattern layer is patterned using the second metal pattern as a mask, so that a second fine pattern is formed between adjacent portions of the first fine pattern.

    摘要翻译： 提供了形成精细图案的方法。 在该方法中，通过分别对第一精细图案层上的基底基板上的第一精细图案层和第一金属层进行构图来形成第一精细图案和第一金属图案。 在第一精细图案和第一金属图案上顺序地形成第二精细图案层和第二金属层。 图案化第二金属层，使得在第一精细图案的相邻部分之间的第二金属图案。 使用第二金属图案作为掩模对第二精细图案图案进行图案化，使得在第一精细图案的相邻部分之间形成第二精细图案。

    THIN FILM TRANSISTOR AND METHOD OF MANUFACTURING THE SAME
    7.
    发明申请
    THIN FILM TRANSISTOR AND METHOD OF MANUFACTURING THE SAME 审中-公开
    薄膜晶体管及其制造方法

    公开(公告)号：US20130001573A1

    公开(公告)日：2013-01-03

    申请号：US13418172

    申请日：2012-03-12

    申请人： Yong-Su LEE ,  Yoon-Ho KHANG ,  Se-Hwan YU ,  Su-Hyoung KANG

    发明人： Yong-Su LEE ,  Yoon-Ho KHANG ,  Se-Hwan YU ,  Su-Hyoung KANG

    IPC分类号： H01L29/786 ,  H01L21/36

    CPC分类号： H01L29/78642 ,  H01L29/41733 ,  H01L29/41741 ,  H01L29/41775 ,  H01L29/45 ,  H01L29/66666 ,  H01L29/6675 ,  H01L29/78606 ,  H01L29/7869

    摘要： A thin film transistor including a gate electrode, a semiconductor layer, a gate insulating layer, a source electrode, a drain electrode and a graphene pattern. The semiconductor layer overlaps with the gate electrode. The gate insulating layer is disposed between the gate electrode and the semiconductor layer. The source electrode overlaps with the semiconductor layer. The drain electrode overlaps with the semiconductor layer. The drain electrode is spaced apart from the source electrode. The graphene pattern is disposed between the semiconductor layer and at least one of the source electrode and the drain electrode.

    摘要翻译： 一种薄膜晶体管，包括栅电极，半导体层，栅极绝缘层，源电极，漏电极和石墨烯图案。 半导体层与栅电极重叠。 栅极绝缘层设置在栅电极和半导体层之间。 源电极与半导体层重叠。 漏电极与半导体层重叠。 漏电极与源电极间隔开。 石墨烯图案设置在半导体层与源电极和漏电极中的至少一个之间。