Preamble defect detection and mitigation

    公开(公告)号:US10277718B1

    公开(公告)日:2019-04-30

    申请号:US15359591

    申请日:2016-11-22

    Abstract: Systems and methods are disclosed for detection and mitigation of defects within a preamble portion of a signal, such as a data sector preamble recorded to a data storage medium. In certain embodiments, an apparatus may comprise a circuit configured to synchronize a sampling phase for sampling a signal pattern. The circuit may sample a preamble field of the signal pattern to obtain sample values, split the sample values into a plurality of groups, determine defect groups having samples corresponding to defects in the preamble field, remove the defect groups from the plurality of groups, and synchronize the sampling phase based on the plurality of groups.

    Preamble detection and frequency offset determination

    公开(公告)号:US10243703B1

    公开(公告)日:2019-03-26

    申请号:US15810545

    申请日:2017-11-13

    Abstract: Systems and methods are disclosed for detection of a selected signal pattern, such as a servo sector preamble, and for frequency offset determination. A circuit may be configured to divide a signal into detection windows of a selected size, and sample the signal a selected number of times within each detection window. The circuit may then determine an error value for each detection window based on values of the samples for each detection window, and determine the preamble is detected when a threshold number of most-recently sampled detection windows have error values below a threshold value. The circuit may then organize the sample values corresponding to the preamble into groups, and calculate phase estimates representing a phase at which the groups were sampled. The circuit may determine a frequency offset based on the phase estimates, and modulate the sampling frequency according to the frequency offset.

    Position error signal burst demodulation

    公开(公告)号:US09979573B1

    公开(公告)日:2018-05-22

    申请号:US15390447

    申请日:2016-12-23

    CPC classification number: H04L27/06 H04L27/22

    Abstract: A method may generate a demodulated sine component for a sequence of samples of a servo burst window of a position error signal using a sine weight look up table and generate a demodulated cosine component for the sequence of samples of the servo burst window of the position error signal using a cosine weight look up table. The sine weight and the cosine weight look up tables may have indexes representing a phase range. The method may generate a demodulated phase component signal and a demodulated amplitude component signal for the sequence of samples of the servo burst window of the position error signal based on the demodulated sine component and the demodulated cosine component using a Coordinate Rotation Digital Computer at least in part by iteratively rotating a vector based on the demodulated sine component and the demodulated cosine component and summing angular changes in the vector.

    Wide frequency range clock generation with phase interpolation

    公开(公告)号:US10298240B1

    公开(公告)日:2019-05-21

    申请号:US15950766

    申请日:2018-04-11

    Abstract: In certain embodiments, an apparatus may comprise a circuit configured to scale a phase control value from an external phase control resolution of an external clock frequency to an internal phase control resolution of an internal clock frequency to generate a target phase control value. The circuit may also determine a difference between a current phase control value and the target phase control value and determine a phase step value based on the difference. Further, the circuit may modify a current phase control value based on the phase step value and generate a phase controlled clock signal at the internal clock frequency using the modified phase control value. Additionally, the circuit may divide the phase controlled clock signal at the internal clock frequency to generate a phase controlled clock signal at the external clock frequency.

    Preamble detection and frequency offset determination

    公开(公告)号:US09819456B1

    公开(公告)日:2017-11-14

    申请号:US15295958

    申请日:2016-10-17

    CPC classification number: G11B20/10009 H04L7/042 H04L2007/047

    Abstract: Systems and methods are disclosed for detection of a selected signal pattern, such as a servo sector preamble, and for frequency offset determination. A circuit may be configured to divide a signal into detection windows of a selected size, and sample the signal a selected number of times within each detection window. The circuit may then determine an error value for each detection window based on values of the samples for each detection window, and determine the preamble is detected when a threshold number of most-recently sampled detection windows have error values below a threshold value. The circuit may then organize the sample values corresponding to the preamble into groups, and calculate phase estimates representing a phase at which the groups were sampled. The circuit may determine a frequency offset based on the phase estimates, and modulate the sampling frequency according to the frequency offset.

    Constrained receiver parameter optimization

    公开(公告)号:US10790933B1

    公开(公告)日:2020-09-29

    申请号:US16454395

    申请日:2019-06-27

    Abstract: Systems and methods are disclosed for constrained receiver parameter optimization. Two parameter optimization functions may be applied, with one function providing constraints on the results of the second function in order to determine a parameter set to apply in the receiver. A method may comprise determining a first parameter set based on a first function, determining a second parameter set based on a second function different from the first function, and determining a third parameter set by using the first parameter set to define a subset of a parameter space to which to limit values from the second parameter set. In certain embodiments, a least squares function may be used to constrain the results of a general cost function.

    Target parameter adaptation
    8.
    发明授权

    公开(公告)号:US10692527B1

    公开(公告)日:2020-06-23

    申请号:US16211186

    申请日:2018-12-05

    Abstract: An apparatus may include a circuit including a filter configured to update one or more adaptive coefficients of the filter based on an error signal. Further, the circuit may update a constrained coefficient of the filter based on the one or more adaptive coefficients, the constrained coefficient and a desired value. Moreover, the circuit may generate a sample of a sample sequence based on the one or more adaptive coefficients and the updated constrained coefficient, the error signal being based on the sample sequence.

    Position error signal burst demodulation

    公开(公告)号:US10601617B1

    公开(公告)日:2020-03-24

    申请号:US15973944

    申请日:2018-05-08

    Abstract: A method may generate a demodulated sine component for a sequence of samples of a servo burst window of a position error signal using a sine weight look up table and generate a demodulated cosine component for the sequence of samples of the servo burst window of the position error signal using a cosine weight look up table. The sine weight and the cosine weight look up tables may have indexes representing a phase range. The method may generate a demodulated phase component signal and a demodulated amplitude component signal for the sequence of samples of the servo burst window of the position error signal based on the demodulated sine component and the demodulated cosine component using a Coordinate Rotation Digital Computer at least in part by iteratively rotating a vector based on the demodulated sine component and the demodulated cosine component and summing angular changes in the vector.

    Timing excursion recovery
    10.
    发明授权

    公开(公告)号:US10164760B1

    公开(公告)日:2018-12-25

    申请号:US15297089

    申请日:2016-10-18

    Abstract: Systems and methods are disclosed for detecting and compensating for timing excursions in a data channel. If a signal contains discontinuities in phase, a detector of the channel may lose lock on the signal, resulting in the channel incorrectly adjusting a sampling phase toward a following symbol or previous symbol. This is referred to as a cycle slip, where the integer alignment of the sampling of a signal contains a discontinuity over the duration of a sector, preventing decoding of the signal. A circuit may be configured to detect a cycle slip during processing of a signal at a data channel based on timing error values, and when the signal fails to decode, shift an expected sampling phase of a detector for a subsequent signal processing attempt. Shifting the expected sampling phase can cause the channel to adjust the sampling phase in the correct direction, thereby preventing a cycle slip.

Patent Agency Ranking