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公开(公告)号:US10439074B2
公开(公告)日:2019-10-08
申请号:US16034456
申请日:2018-07-13
Applicant: Semiconductor Energy Laboratory Co., Ltd.
Inventor: Shunpei Yamazaki , Kenichi Okazaki , Masashi Tsubuku , Satoru Saito , Noritaka Ishihara
IPC: H01L21/00 , H01L29/786 , H01L27/12 , H01L29/04 , H01L29/24 , H01L27/06 , H01L21/8258 , H01L27/088
Abstract: A semiconductor device with improved electrical characteristics is provided. A semiconductor device with improved field effect mobility is provided. A semiconductor device in which the field-effect mobility is not lowered even at high temperatures is provided. A semiconductor device which can be formed at low temperatures is provided. A semiconductor device with improved productivity can be provided. In the semiconductor device, there is a range of a gate voltage where the field-effect mobility increases as the temperature increases within a range of the gate voltage from 0 V to 10 V. For example, such a range of a gate voltage exists at temperatures ranging from a room temperature (25° C.) to 120° C. In the semiconductor device, the off-state current is kept extremely low (lower than or equal to the detection limit of a measurement device) within the above temperature range.
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公开(公告)号:US10403760B2
公开(公告)日:2019-09-03
申请号:US15058330
申请日:2016-03-02
Applicant: Semiconductor Energy Laboratory Co., Ltd.
Inventor: Kenichi Okazaki , Junichi Koezuka , Toshimitsu Obonai , Satoru Saito , Shunpei Yamazaki
Abstract: A novel oxide semiconductor film. An oxide semiconductor film with a small amount of defects. An oxide semiconductor film in which a peak value of the density of shallow defect states at an interface between the oxide semiconductor film and an insulating film is small. The oxide semiconductor film includes In, M (M is Al, Ga, Y, or Sn), Zn, and a region in which a peak value of a density of shallow defect states is less than 1E13 per square cm per volt.
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公开(公告)号:US09818880B2
公开(公告)日:2017-11-14
申请号:US15012403
申请日:2016-02-01
Applicant: Semiconductor Energy Laboratory Co., Ltd.
Inventor: Hiroyuki Miyake , Junichi Koezuka , Kenichi Okazaki , Daisuke Kurosaki , Yukinori Shima , Satoru Saito
IPC: H01L29/10 , H01L29/786 , H01L27/12
CPC classification number: H01L29/7869 , H01L27/124 , H01L29/78696
Abstract: To reduce parasitic capacitance in a semiconductor device having a transistor including an oxide semiconductor. The transistor includes a first gate electrode, a first gate insulating film over the first gate electrode, an oxide semiconductor film over the first gate insulating film, and source and drain electrodes electrically connected to the oxide semiconductor film. The oxide semiconductor film includes a first oxide semiconductor film on the first gate electrode side and a second oxide semiconductor film over the first oxide semiconductor film. The atomic proportion of In is larger than the atomic proportion of M (M is Ti, Ga, Sn, Y, Zr, La, Ce, Nd, or Hf) in the first oxide semiconductor film, and the atomic proportion of In in the second oxide semiconductor film is smaller than that in the first oxide semiconductor film.
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公开(公告)号:US09773916B2
公开(公告)日:2017-09-26
申请号:US14623086
申请日:2015-02-16
Applicant: Semiconductor Energy Laboratory Co., Ltd.
Inventor: Shunpei Yamazaki , Jun Koyama , Satoru Saito , Terumasa Ikeyama
IPC: H01L27/01 , H01L29/786 , H01L29/417
CPC classification number: H01L29/7869 , H01L29/41733
Abstract: An object of one embodiment of the present invention is to provide a highly reliable semiconductor device by giving stable electric characteristics to a transistor including an oxide semiconductor film. The semiconductor device includes a gate electrode layer over a substrate, a gate insulating film over the gate electrode layer, an oxide semiconductor film over the gate insulating film, a drain electrode layer provided over the oxide semiconductor film to overlap with the gate electrode layer, and a source electrode layer provided to cover an outer edge portion of the oxide semiconductor film. The outer edge portion of the drain electrode layer is positioned on the inner side than the outer edge portion of the gate electrode layer.
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公开(公告)号:US09722090B2
公开(公告)日:2017-08-01
申请号:US14741961
申请日:2015-06-17
Applicant: Semiconductor Energy Laboratory Co., Ltd.
Inventor: Hideaki Shishido , Satoru Saito , Yukinori Shima , Daisuke Kurosaki , Junichi Koezuka , Shunpei Yamazaki
IPC: H01L29/10 , H01L29/786 , H01L29/24 , H01L29/06 , H01L29/04 , H01L29/417 , H01L29/66
CPC classification number: H01L29/7869 , H01L29/04 , H01L29/0692 , H01L29/24 , H01L29/41733 , H01L29/41775 , H01L29/66969 , H01L29/78618 , H01L29/78648 , H01L29/78696
Abstract: A semiconductor device with stable electrical characteristics is provided. The semiconductor device includes an oxide semiconductor film, a first gate electrode, a second gate electrode, a first conductive film, and a second conductive film. The first gate electrode is electrically connected to the second gate electrode. The first conductive film and the second conductive film function as a source electrode and a drain electrode. The oxide semiconductor film includes a first region that overlaps with the first conductive film, a second region that overlaps with the second conductive film, and a third region that overlaps with a gate electrode and the third conductive film. The first region includes a first edge that is opposed to the second region. The second region includes a second edge that is opposed to the first region. The length of the first edge is shorter than the length of the second edge.
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公开(公告)号:US11894466B2
公开(公告)日:2024-02-06
申请号:US17279153
申请日:2019-09-27
Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
Inventor: Rai Sato , Masami Jintyou , Masayoshi Dobashi , Takashi Shiraishi , Satoru Saito , Yasutaka Nakazawa
IPC: H01L29/786 , H01L29/423 , H01L29/66 , H01L27/12 , H01L29/49
CPC classification number: H01L29/78621 , H01L29/42384 , H01L29/66969 , H01L27/1225 , H01L29/4908 , H01L29/7869 , H01L2029/42388
Abstract: A semiconductor device with favorable electrical characteristics is provided. A highly reliable semiconductor device is provided. The semiconductor device includes a semiconductor layer, a first insulating layer, a second insulating layer, a metal oxide layer, and a conductive layer; the first insulating layer, the metal oxide layer, and the conductive layer are stacked in this order over the semiconductor layer; an end portion of the first insulating layer is located inward from an end portion of the semiconductor layer; an end portion of the metal oxide layer is located inward from the end portion of the first insulating layer; and an end portion of the conductive layer is located inward from the end portion of the metal oxide layer. The second insulating layer is preferably provided to cover the semiconductor layer, the first insulating layer, the metal oxide layer, and the conductive layer. It is preferable that the semiconductor layer include a first region, a pair of second regions, and a pair of third regions; the first region overlap with the first insulating layer and the metal oxide layer; the second regions between which the first region is sandwiched overlap with the first insulating layer and not overlap with the metal oxide layer; the third regions between which the first region and the pair of second regions are sandwiched not overlap with the first insulating layer; and the third regions be in contact with the second insulating layer.
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公开(公告)号:US10038100B2
公开(公告)日:2018-07-31
申请号:US15429234
申请日:2017-02-10
Applicant: Semiconductor Energy Laboratory Co., Ltd.
Inventor: Shunpei Yamazaki , Kenichi Okazaki , Masashi Tsubuku , Satoru Saito , Noritaka Ishihara
IPC: H01L21/00 , H01L29/786 , H01L27/12 , H01L29/04 , H01L29/24
CPC classification number: H01L29/78696 , H01L21/8258 , H01L27/0688 , H01L27/088 , H01L27/1225 , H01L29/045 , H01L29/24 , H01L29/78648 , H01L29/7869
Abstract: A semiconductor device with improved electrical characteristics is provided. A semiconductor device with improved field effect mobility is provided. A semiconductor device in which the field-effect mobility is not lowered even at high temperatures is provided. A semiconductor device which can be formed at low temperatures is provided. A semiconductor device with improved productivity can be provided. In the semiconductor device, there is a range of a gate voltage where the field-effect mobility increases as the temperature increases within a range of the gate voltage from 0 V to 10 V. For example, such a range of a gate voltage exists at temperatures ranging from a room temperature (25° C.) to 120° C. In the semiconductor device, the off-state current is kept extremely low (lower than or equal to the detection limit of a measurement device) within the above temperature range.
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公开(公告)号:US08987730B2
公开(公告)日:2015-03-24
申请号:US13751767
申请日:2013-01-28
Applicant: Semiconductor Energy Laboratory Co., Ltd.
Inventor: Shunpei Yamazaki , Jun Koyama , Satoru Saito , Terumasa Ikeyama
IPC: H01L29/04 , H01L29/786 , H01L29/417
CPC classification number: H01L29/7869 , H01L29/41733
Abstract: An object of one embodiment of the present invention is to provide a highly reliable semiconductor device by giving stable electric characteristics to a transistor including an oxide semiconductor film. The semiconductor device includes a gate electrode layer over a substrate, a gate insulating film over the gate electrode layer, an oxide semiconductor film over the gate insulating film, a drain electrode layer provided over the oxide semiconductor film to overlap with the gate electrode layer, and a source electrode layer provided to cover an outer edge portion of the oxide semiconductor film. The outer edge portion of the drain electrode layer is positioned on the inner side than the outer edge portion of the gate electrode layer.
Abstract translation: 本发明的一个实施例的目的是通过给包括氧化物半导体膜的晶体管提供稳定的电特性来提供高度可靠的半导体器件。 半导体器件包括:衬底上的栅极电极层,栅极电极层上的栅极绝缘膜,栅极绝缘膜上的氧化物半导体膜;设置在氧化物半导体膜上方的与电极层重叠的漏电极层, 以及源电极层,设置为覆盖氧化物半导体膜的外边缘部分。 漏电极层的外缘部位于比栅电极层的外缘部更内侧。
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