公开(公告)号：US12166134B2

公开(公告)日：2024-12-10

申请号：US17433458

申请日：2020-02-19

Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.

Inventor： Shunpei Yamazaki ,  Toshimitsu Obonai ,  Junichi Koezuka ,  Kenichi Okazaki

IPC: H01L29/786 ,  H01L27/12 ,  H01L29/04 ,  H01L29/24 ,  H01L29/49 ,  G02F1/1368 ,  H10K59/121

Abstract: A semiconductor device with favorable electrical characteristics is provided. A semiconductor device with high reliability is provided. A semiconductor device with stable electrical characteristics is provided. The semiconductor device includes a semiconductor layer, a first insulating layer, a second insulating layer, and a conductive layer. The semiconductor layer, the second insulating layer, and the conductive layer are stacked in this order over the first insulating layer. The semiconductor layer contains indium and oxygen and has a composition falling within a range obtained by connecting first coordinates (1:0:0), second coordinates (2:1:0), third coordinates (14:7:1), fourth coordinates (7:2:2), fifth coordinates (14:4:21), sixth coordinates (2:0:3), and the first coordinates in this order with a straight line in a ternary diagram showing atomic ratios of indium to an element M and zinc. In addition, the element M is one or more of gallium, aluminum, yttrium, and tin.

公开(公告)号：US11810858B2

公开(公告)日：2023-11-07

申请号：US17729306

申请日：2022-04-26

Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.

Inventor： Junichi Koezuka ,  Toshimitsu Obonai ,  Masami Jintyou ,  Daisuke Kurosaki

IPC: H01L23/532 ,  H01L21/02 ,  H01L21/263 ,  H01L21/265

CPC classification number: H01L23/5329 ,  H01L21/02129 ,  H01L21/265 ,  H01L21/2636

Abstract: A semiconductor device having favorable electrical characteristics is provided. A semiconductor device having stable electrical characteristics is provided. A highly reliable semiconductor device is provided. The semiconductor device includes a semiconductor layer, a first insulating layer, and a first conductive layer. The semiconductor layer includes an island-shaped top surface. The first insulating layer is provided in contact with a top surface and a side surface of the semiconductor layer. The first conductive layer is positioned over the first insulating layer and includes a portion overlapping with the semiconductor layer. In addition, the semiconductor layer includes a metal oxide, and the first insulating layer includes an oxide. The semiconductor layer includes a first region overlapping with the first conductive layer and a second region not overlapping with the first conductive layer. The first insulating layer includes a third region overlapping with the first conductive layer and a fourth region not overlapping with the first conductive layer. Furthermore, the second region and the fourth region contain phosphorus or boron.

公开(公告)号：US09876099B2

公开(公告)日：2018-01-23

申请号：US15493215

申请日：2017-04-21

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Masami Jintyou ,  Toshimitsu Obonai ,  Junichi Koezuka ,  Suzunosuke Hiraishi

IPC: H01L21/00 ,  H01L29/66 ,  H01L29/786 ,  H01L21/441 ,  H01L21/4757 ,  H01L21/385

CPC classification number: H01L27/1225 ,  H01L21/385 ,  H01L21/441 ,  H01L21/47573 ,  H01L27/127 ,  H01L29/42384 ,  H01L29/66742 ,  H01L29/66969 ,  H01L29/78606 ,  H01L29/7869

Abstract: To suppress change in electric characteristics and improve reliability of a semiconductor device including a transistor formed using an oxide semiconductor. A semiconductor device includes a transistor including a gate electrode, a first insulating film, an oxide semiconductor film, a second insulating film, and a pair of electrodes. The gate electrode and the oxide semiconductor film overlap with each other. The oxide semiconductor film is located between the first insulating film and the second insulating film and in contact with the pair of electrodes. The first insulating film is located between the gate electrode and the oxide semiconductor film. An etching rate of a region of at least one of the first insulating film and the second insulating film is higher than 8 nm/min when etching is performed using a hydrofluoric acid.

公开(公告)号：US09035301B2

公开(公告)日：2015-05-19

申请号：US14303629

申请日：2014-06-13

Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.

Inventor： Hironobu Takahashi ,  Yukinori Shima ,  Yasuharu Hosaka ,  Toshimitsu Obonai ,  Masashi Tsubuku

IPC: H01L29/22 ,  H01L27/146 ,  H01L29/786

CPC classification number: H01L27/14663 ,  H01L27/14616 ,  H01L27/14625 ,  H01L27/14692 ,  H01L29/42384 ,  H01L29/4908 ,  H01L29/7869 ,  H04N5/3745

Abstract: An imaging device that is highly stable to irradiation with radial rays such as X-rays and can inhibit a decrease in electrical characteristics is provided. The imaging device takes an image with radial rays such as X-rays and includes pixel circuits arranged in a matrix and a scintillator overlapping the pixel circuits. The pixel circuits each includes a switching transistor with an extremely small off-state current and a light-receiving element which is configured to convert the radial rays to electrical charges. A gate insulating film of the switching transistor has a stacked structure including a silicon nitride film with a thickness of 100 nm to 400 nm and a silicon oxide film or a silicon oxynitride film with a thickness of 5 nm to 20 nm.

Abstract translation: 提供了对X射线等径向射线照射高度稳定的成像装置，能够抑制电特性的降低。 成像装置拍摄具有诸如X射线的径向射线的图像，并且包括以矩阵布置的像素电路和与像素电路重叠的闪烁体。 像素电路各自包括非常小的截止电流的开关晶体管和被配置为将径向射线转换成电荷的光接收元件。 开关晶体管的栅极绝缘膜具有包括厚度为100nm至400nm的氮化硅膜和厚度为5nm至20nm的氧化硅膜或氮氧化硅膜的叠层结构。

公开(公告)号：US20140152336A1

公开(公告)日：2014-06-05

申请号：US14091907

申请日：2013-11-27

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Toshinari Sasaki ,  Hiroshi Kanemura ,  Yasuharu Hosaka ,  Shuhei Yokoyama ,  Toshimitsu Obonai

IPC: G01R31/26 ,  H01L29/22

CPC classification number: H01L29/7869 ,  G01R31/2656 ,  G09G3/006 ,  G09G3/3225 ,  G09G3/3648 ,  H01L27/14678 ,  H01L27/14692 ,  H01L29/22

Abstract: A semiconductor layer with a low density of trap states is provided. A transistor with stable electrical characteristics is provided. A transistor having high field-effect mobility is provided. A semiconductor device including the transistor is provided. A method for evaluating a semiconductor layer is provided. A method for evaluating a transistor is provided. A method for evaluating a semiconductor device is provided. Provided is, for example, a semiconductor layer with a low defect density which can be used for a channel formation region of a transistor, a transistor including a semiconductor layer with a low defect density in a channel formation region, or a semiconductor device including the transistor.

Abstract translation: 提供了具有低密度陷阱状态的半导体层。 提供具有稳定电特性的晶体管。 提供具有高场效应迁移率的晶体管。 提供包括晶体管的半导体器件。 提供了一种用于评估半导体层的方法。 提供了一种用于评估晶体管的方法。 提供了一种用于评估半导体器件的方法。 例如，提供了可以用于晶体管的沟道形成区域的具有低缺陷密度的半导体层，在沟道形成区域中包括具有低缺陷密度的半导体层的晶体管，或包括晶体管的半导体器件 晶体管。

公开(公告)号：US11705525B2

公开(公告)日：2023-07-18

申请号：US17367677

申请日：2021-07-06

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Shunpei Yamazaki ,  Junichi Koezuka ,  Masami Jintyou ,  Yasutaka Nakazawa ,  Toshimitsu Obonai

IPC: H01L27/12 ,  H01L29/66 ,  G02F1/00 ,  H01L29/786 ,  G02F1/1368

CPC classification number: H01L29/7869 ,  G02F1/1368 ,  H01L27/1225 ,  H01L29/66969

Abstract: A semiconductor device with favorable electrical characteristics, a semiconductor device with stable electrical characteristics, or a highly reliable semiconductor device or display device is provided. A first insulating layer and a first conductive layer are stacked over a first region of a first metal oxide layer. A first layer is formed in contact with a second metal oxide layer and a second region of the first metal oxide layer that is not overlapped by the first insulating layer. Heat treatment is performed to lower the resistance of the second region and the second metal oxide layer. A second insulating layer is formed. A second conductive layer electrically connected to the second region is formed over the second insulating layer. Here, the first layer is formed to contain at least one of aluminum, titanium, tantalum, and tungsten.

公开(公告)号：US11063125B2

公开(公告)日：2021-07-13

申请号：US16739647

申请日：2020-01-10

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Yasuharu Hosaka ,  Toshimitsu Obonai ,  Yukinori Shima ,  Masami Jintyou ,  Daisuke Kurosaki ,  Takashi Hamochi ,  Junichi Koezuka ,  Kenichi Okazaki ,  Shunpei Yamazaki

IPC: H01L29/24 ,  H01L29/786 ,  C04B35/622 ,  C04B35/453 ,  H01L27/12 ,  H01L29/778 ,  C23C14/58 ,  C23C14/08 ,  C04B35/01 ,  C03C17/245

Abstract: A metal oxide film includes indium, M, (M is Al, Ga, Y, or Sn), and zinc and includes a region where a peak having a diffraction intensity derived from a crystal structure is observed by X-ray diffraction in the direction perpendicular to the film surface. Moreover, a plurality of crystal parts is observed in a transmission electron microscope image in the direction perpendicular to the film surface. The proportion of a region other than the crystal parts is higher than or equal to 20% and lower than or equal to 60%.

公开(公告)号：US10403760B2

公开(公告)日：2019-09-03

申请号：US15058330

申请日：2016-03-02

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Kenichi Okazaki ,  Junichi Koezuka ,  Toshimitsu Obonai ,  Satoru Saito ,  Shunpei Yamazaki

IPC: H01L29/786 ,  H01L29/04 ,  H01L29/24 ,  H01L29/34 ,  H01L29/66 ,  H01L29/49 ,  H01L27/12

Abstract: A novel oxide semiconductor film. An oxide semiconductor film with a small amount of defects. An oxide semiconductor film in which a peak value of the density of shallow defect states at an interface between the oxide semiconductor film and an insulating film is small. The oxide semiconductor film includes In, M (M is Al, Ga, Y, or Sn), Zn, and a region in which a peak value of a density of shallow defect states is less than 1E13 per square cm per volt.

公开(公告)号：US10290656B2

公开(公告)日：2019-05-14

申请号：US14721362

申请日：2015-05-26

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Junichi Koezuka ,  Masami Jintyou ,  Daisuke Kurosaki ,  Yukinori Shima ,  Toshimitsu Obonai

IPC: H01L29/66 ,  H01L29/786 ,  H01L27/12 ,  H01L21/04 ,  H01L21/26

Abstract: Provided is a transistor which includes an oxide semiconductor film in a channel region. A change from a shift value before light irradiation to a shift value under light irradiation is greater than or equal to −1 V and less than or equal to 0.5 V, where the shift value is a gate voltage at a point of intersection of an axis of 1×10−12 A and a steepest tangent line of the logarithm of a drain current in drain current-gate voltage characteristics of the transistor, and where the light irradiation is performed on the oxide semiconductor film with light having an energy greater than or equal to a band gap of the oxide semiconductor film.

公开(公告)号：US10096684B2

公开(公告)日：2018-10-09

申请号：US15391186

申请日：2016-12-27

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Yasuharu Hosaka ,  Toshimitsu Obonai ,  Yukinori Shima ,  Masami Jintyou ,  Daisuke Kurosaki ,  Takashi Hamochi ,  Junichi Koezuka ,  Kenichi Okazaki ,  Shunpei Yamazaki

IPC: H01L29/24 ,  C04B35/453 ,  C04B35/622 ,  H01L29/786 ,  C03C17/245 ,  C04B35/01 ,  C23C14/08 ,  C23C14/58

Abstract: A metal oxide film includes indium, M, (M is Al, Ga, Y, or Sn), and zinc and includes a region where a peak having a diffraction intensity derived from a crystal structure is observed by X-ray diffraction in the direction perpendicular to the film surface. Moreover, a plurality of crystal parts is observed in a transmission electron microscope image in the direction perpendicular to the film surface. The proportion of a region other than the crystal parts is higher than or equal to 20% and lower than or equal to 60%.