公开(公告)号：US20120064692A1

公开(公告)日：2012-03-15

申请号：US13235079

申请日：2011-09-16

申请人： Seong-Ho MOON ,  Hong-Sik Yoon ,  Subramanya Mayya ,  Sun-Woo Lee ,  Dong-Woo Kim ,  Xiaofeng Wang

发明人： Seong-Ho MOON ,  Hong-Sik Yoon ,  Subramanya Mayya ,  Sun-Woo Lee ,  Dong-Woo Kim ,  Xiaofeng Wang

IPC分类号： H01L21/20 ,  B82Y40/00

CPC分类号： H01L27/1021 ,  B82Y10/00 ,  G11C13/025 ,  G11C23/00 ,  G11C2213/16 ,  H01L51/0048 ,  H01L51/057 ,  H01L51/0579

摘要： A method of manufacturing a memory device having a carbon nanotube can be provided by forming a lower electrode on a substrate and forming an insulating interlayer on the lower electrode. An upper electrode including a diode can be formed on the insulating interlayer, where the upper electrode can have a first void exposing a sidewall of the diode and a portion of the insulating interlayer. A portion of the insulating interlayer can be partially removed to form an insulating interlayer pattern having a second void that exposes a portion of the lower electrode, where the second void can be connected with the first void. A carbon nanotube wiring can be formed from the lower electrode through the second and first voids, where the carbon nanotube wiring may be capable of being electrically connected with the diode of the upper electrode by a voltage applied to the lower electrode.

摘要翻译： 可以通过在基板上形成下电极并在下电极上形成绝缘中间层来提供制造具有碳纳米管的存储器件的方法。 可以在绝缘中间层上形成包括二极管的上电极，其中上电极可以具有暴露二极管的侧壁和绝缘中间层的一部分的第一空隙。 绝缘中间层的一部分可以被部分去除以形成具有暴露下部电极的一部分的第二空隙的绝缘层间图案，其中第二空隙可与第一空隙连接。 碳纳米管布线可以由下电极通过第二和第一空隙形成，其中碳纳米管布线可以通过施加到下电极的电压与上电极的二极管电连接。

公开(公告)号：US08039919B2

公开(公告)日：2011-10-18

申请号：US12469295

申请日：2009-05-20

申请人： Seong-Ho Moon ,  Hong-Sik Yoon ,  Subramanya Mayya ,  Sun-Woo Lee ,  Dong-Woo Kim ,  Xiaofeng Wang

发明人： Seong-Ho Moon ,  Hong-Sik Yoon ,  Subramanya Mayya ,  Sun-Woo Lee ,  Dong-Woo Kim ,  Xiaofeng Wang

IPC分类号： H01L29/40

CPC分类号： H01L27/1021 ,  B82Y10/00 ,  G11C13/025 ,  G11C23/00 ,  G11C2213/16 ,  H01L51/0048 ,  H01L51/057 ,  H01L51/0579

摘要： In a memory device having a carbon nanotube and a method of manufacturing the same, the memory device includes a lower electrode, an upper electrode having a first void exposing a sidewall of a diode therein, an insulating interlayer pattern having a second void exposing a portion of the lower electrode between the lower electrode and the upper electrode, and a carbon nanotube wiring capable of being electrically connected with the diode of the upper electrode by a voltage applied to the lower electrode. The memory device may reduce generation of a leakage current in a cross-bar memory.

摘要翻译： 在具有碳纳米管的存储器件及其制造方法中，存储器件包括下电极，具有暴露其二极管侧壁的第一空隙的上电极，绝缘层间图案，具有暴露部分 下电极和上电极之间的下电极，以及能够通过施加到下电极的电压与上电极的二极管电连接的碳纳米管布线。 存储器件可以减少横条存储器中的漏电流的产生。

公开(公告)号：US20090289322A1

公开(公告)日：2009-11-26

申请号：US12469295

申请日：2009-05-20

申请人： Seong-Ho Moon ,  Hong-Sik Yoon ,  Subramanya Mayya ,  Sun-Woo Lee ,  Dong-Woo Kim ,  Xiaofeng Wang

发明人： Seong-Ho Moon ,  Hong-Sik Yoon ,  Subramanya Mayya ,  Sun-Woo Lee ,  Dong-Woo Kim ,  Xiaofeng Wang

IPC分类号： H01L29/872 ,  H01L23/52

CPC分类号： H01L27/1021 ,  B82Y10/00 ,  G11C13/025 ,  G11C23/00 ,  G11C2213/16 ,  H01L51/0048 ,  H01L51/057 ,  H01L51/0579

摘要： In a memory device having a carbon nanotube and a method of manufacturing the same, the memory device includes a lower electrode, an upper electrode having a first void exposing a sidewall of a diode therein, an insulating interlayer pattern having a second void exposing a portion of the lower electrode between the lower electrode and the upper electrode, and a carbon nanotube wiring capable of being electrically connected with the diode of the upper electrode by a voltage applied to the lower electrode. The memory device may reduce generation of a leakage current in a cross-bar memory.

摘要翻译： 在具有碳纳米管的存储器件及其制造方法中，存储器件包括下电极，具有暴露其二极管侧壁的第一空隙的上电极，绝缘层间图案，具有暴露部分 下电极和上电极之间的下电极，以及能够通过施加到下电极的电压与上电极的二极管电连接的碳纳米管布线。 存储器件可以减少横条存储器中的漏电流的产生。

公开(公告)号：US20090271982A1

公开(公告)日：2009-11-05

申请号：US12387299

申请日：2009-04-29

申请人： Sun-Woo Lee ,  Seong-Ho Moon ,  Dong-Woo Kim ,  Jung-Hyeon Kim ,  Hong-Sik Yoon

发明人： Sun-Woo Lee ,  Seong-Ho Moon ,  Dong-Woo Kim ,  Jung-Hyeon Kim ,  Hong-Sik Yoon

IPC分类号： H05K3/10

CPC分类号： H01L21/76879 ,  H01L21/76849 ,  H01L23/5252 ,  H01L23/53276 ,  H01L2221/1094 ,  H01L2924/0002 ,  Y10T29/49117 ,  Y10T29/4913 ,  Y10T29/49155 ,  H01L2924/00

摘要： In a method of forming a wiring having a carbon nanotube, a lower wiring is formed on a substrate, and a catalyst layer is formed on the lower wiring. An insulating interlayer is formed on the substrate to cover the catalyst layer, and an opening is formed through the insulating interlayer to expose an upper face of the catalyst layer. A carbon nanotube wiring is formed in the opening, and an upper wiring is formed on the carbon nanotube wiring and the insulating interlayer to be electrically connected to the carbon nanotube wiring. A thermal stress is generated between the carbon nanotube wiring and the upper wiring to produce a dielectric breakdown of a native oxide layer formed on a surface of the carbon nanotube wiring. A wiring having a reduced electrical resistance between the carbon nanotube wiring and the upper wiring may be obtained.

摘要翻译： 在形成具有碳纳米管的布线的方法中，在基板上形成下布线，并且在下布线上形成催化剂层。 在衬底上形成绝缘中间层以覆盖催化剂层，并且通过绝缘中间层形成开口以暴露催化剂层的上表面。 在开口部形成有碳纳米管布线，在碳纳米管布线和绝缘中间层上形成上部配线，与碳纳米管配线电连接。 在碳纳米管布线和上布线之间产生热应力，以产生形成在碳纳米管布线表面上的天然氧化物层的电介质击穿。 可以获得碳纳米管布线和上布线之间的电阻降低的布线。

公开(公告)号：US07877865B2

公开(公告)日：2011-02-01

申请号：US12387299

申请日：2009-04-29

申请人： Sun-Woo Lee ,  Seong-Ho Moon ,  Dong-Woo Kim ,  Jung-Hyeon Kim ,  Hong-Sik Yoon

发明人： Sun-Woo Lee ,  Seong-Ho Moon ,  Dong-Woo Kim ,  Jung-Hyeon Kim ,  Hong-Sik Yoon

IPC分类号： H01R43/00 ,  H01L21/44

CPC分类号： H01L21/76879 ,  H01L21/76849 ,  H01L23/5252 ,  H01L23/53276 ,  H01L2221/1094 ,  H01L2924/0002 ,  Y10T29/49117 ,  Y10T29/4913 ,  Y10T29/49155 ,  H01L2924/00

摘要： In a method of forming a wiring having a carbon nanotube, a lower wiring is formed on a substrate, and a catalyst layer is formed on the lower wiring. An insulating interlayer is formed on the substrate to cover the catalyst layer, and an opening is formed through the insulating interlayer to expose an upper face of the catalyst layer. A carbon nanotube wiring is formed in the opening, and an upper wiring is formed on the carbon nanotube wiring and the insulating interlayer to be electrically connected to the carbon nanotube wiring. A thermal stress is generated between the carbon nanotube wiring and the upper wiring to produce a dielectric breakdown of a native oxide layer formed on a surface of the carbon nanotube wiring. A wiring having a reduced electrical resistance between the carbon nanotube wiring and the upper wiring may be obtained.

摘要翻译： 在形成具有碳纳米管的布线的方法中，在基板上形成下布线，并且在下布线上形成催化剂层。 在衬底上形成绝缘中间层以覆盖催化剂层，并且通过绝缘中间层形成开口以暴露催化剂层的上表面。 在开口部形成有碳纳米管布线，在碳纳米管布线和绝缘中间层上形成上部配线，与碳纳米管配线电连接。 在碳纳米管布线和上布线之间产生热应力，以产生形成在碳纳米管布线表面上的天然氧化物层的电介质击穿。 可以获得碳纳米管布线和上布线之间的电阻降低的布线。

公开(公告)号：US20080157363A1

公开(公告)日：2008-07-03

申请号：US11785164

申请日：2007-04-16

申请人： Subramanya Mayya Kolake ,  Sun-Woo Lee ,  In-Seok Yeo

发明人： Subramanya Mayya Kolake ,  Sun-Woo Lee ,  In-Seok Yeo

IPC分类号： H01L23/48 ,  B05D5/12

CPC分类号： H01L23/5226 ,  H01L21/288 ,  H01L21/76831 ,  H01L21/76876 ,  H01L21/76879 ,  H01L2221/1094 ,  H01L2924/0002 ,  H01L2924/00

摘要： A method of forming a nanoscale structure includes providing a substrate having a first layer thereon, the first layer having an opening that exposes a region of the substrate, and contacting the substrate with a catalytic material, wherein the exposed region of the substrate has a first property that attracts the catalytic material, and the first layer has a second property that repels the catalytic material.

摘要翻译： 形成纳米尺度结构的方法包括提供其上具有第一层的衬底，第一层具有暴露衬底的区域的开口，以及使衬底与催化材料接触，其中衬底的暴露区域具有第一 吸附催化材料的性质，第一层具有排斥催化材料的第二性质。

公开(公告)号：US07659624B2

公开(公告)日：2010-02-09

申请号：US11785164

申请日：2007-04-16

申请人： Subramanya Mayya Kolake ,  Sun-Woo Lee ,  In-Seok Yeo

发明人： Subramanya Mayya Kolake ,  Sun-Woo Lee ,  In-Seok Yeo

IPC分类号： H01L23/48 ,  B05D5/12 ,  H01L29/76 ,  H01L29/94 ,  H01L31/00

CPC分类号： H01L23/5226 ,  H01L21/288 ,  H01L21/76831 ,  H01L21/76876 ,  H01L21/76879 ,  H01L2221/1094 ,  H01L2924/0002 ,  H01L2924/00

摘要： A semiconductor device includes a substrate, an insulating layer having an opening, the opening exposing a portion of the substrate, a hydrophobic layer covering substantially only a sidewall and a top surface of the insulating layer, and a nanoscale conductive structure on the exposed portion of the substrate.

摘要翻译： 半导体器件包括衬底，具有开口的绝缘层，暴露衬底的一部分的开口，基本上仅覆盖绝缘层的侧壁和顶表面的疏水层，以及在绝缘层的暴露部分上的纳米级导电结构 底物。

公开(公告)号：US08007875B2

公开(公告)日：2011-08-30

申请号：US11832601

申请日：2007-08-01

申请人： Hong-Sik Yoon ,  Young-Moon Choi ,  Sun-Woo Lee

发明人： Hong-Sik Yoon ,  Young-Moon Choi ,  Sun-Woo Lee

IPC分类号： H05H1/24

CPC分类号： B82Y40/00 ,  B82Y30/00 ,  C01B32/162 ,  Y10S977/742

摘要： In a method of forming carbon nano-tubes, a catalytic film is formed on a substrate. The catalytic film is then transformed into preliminary catalytic particles. Thereafter, the preliminary catalytic particles are transformed into catalytic particles. Carbon nano-tubes then grow from the catalytic particles. The carbon nano-tubes have relatively high conductivity and high number density.

摘要翻译： 在形成碳纳米管的方法中，在基板上形成催化膜。 然后将催化膜转化成预催化颗粒。 此后，将预催化剂颗粒转化成催化剂颗粒。 碳纳米管然后从催化颗粒生长。 碳纳米管具有较高的导电性和高密度。

公开(公告)号：US07982318B2

公开(公告)日：2011-07-19

申请号：US11655116

申请日：2007-01-19

申请人： Jang-Eun Heo ,  Young-Moon Choi ,  Sun-Woo Lee ,  Hong-Sik Yoon ,  Kyung-Rae Byun

发明人： Jang-Eun Heo ,  Young-Moon Choi ,  Sun-Woo Lee ,  Hong-Sik Yoon ,  Kyung-Rae Byun

IPC分类号： H01L23/52 ,  H01L23/48 ,  H01L29/40

CPC分类号： H01L21/76843 ,  H01L21/31116 ,  H01L21/3212 ,  H01L21/76823 ,  H01L21/76825 ,  H01L21/76831 ,  H01L21/76867 ,  H01L21/76876 ,  H01L21/76879 ,  H01L23/53276 ,  H01L2221/1094 ,  H01L2924/0002 ,  Y10S977/742 ,  H01L2924/00

摘要： A device includes an insulating layer on a substrate having a lower conductive pattern, the insulating layer having a contact hole that penetrates the insulating layer and exposes a portion of the lower conductive pattern, a catalytic pattern having a first portion on the exposed portion of the lower conductive pattern and a second portion on a sidewall of the contact hole, a spacer on the sidewall of the contact hole, wherein the second portion of the catalytic pattern is disposed between the spacer and the sidewall, and a contact plug in the contact hole and contacting the catalytic pattern, the contact plug being a carbon nanotube material.

摘要翻译： 一种器件包括在具有下导电图案的衬底上的绝缘层，所述绝缘层具有穿透绝缘层并暴露一部分下导电图案的接触孔，催化图案具有第一部分在暴露部分上 下导电图案和接触孔的侧壁上的第二部分，在接触孔的侧壁上的间隔件，其中催化剂图案的第二部分设置在间隔件和侧壁之间，接触插塞在接触孔中 并使催化剂图案接触，所述接触塞是碳纳米管材料。

公开(公告)号：US20100264544A1

公开(公告)日：2010-10-21

申请号：US11655116

申请日：2007-01-19

申请人： Jang-Eun Heo ,  Young-Moon Choi ,  Sun-Woo Lee ,  Hong-Sik Yoon ,  Kyung-Rae Byun

发明人： Jang-Eun Heo ,  Young-Moon Choi ,  Sun-Woo Lee ,  Hong-Sik Yoon ,  Kyung-Rae Byun

IPC分类号： H01L23/48 ,  H01L21/768

CPC分类号： H01L21/76843 ,  H01L21/31116 ,  H01L21/3212 ,  H01L21/76823 ,  H01L21/76825 ,  H01L21/76831 ,  H01L21/76867 ,  H01L21/76876 ,  H01L21/76879 ,  H01L23/53276 ,  H01L2221/1094 ,  H01L2924/0002 ,  Y10S977/742 ,  H01L2924/00

摘要： A device includes an insulating layer on a substrate having a lower conductive pattern, the insulating layer having a contact hole that penetrates the insulating layer and exposes a portion of the lower conductive pattern, a catalytic pattern having a first portion on the exposed portion of the lower conductive pattern and a second portion on a sidewall of the contact hole, a spacer on the sidewall of the contact hole, wherein the second portion of the catalytic pattern is disposed between the spacer and the sidewall, and a contact plug in the contact hole and contacting the catalytic pattern, the contact plug being a carbon nanotube material.

摘要翻译： 一种器件包括在具有下导电图案的衬底上的绝缘层，所述绝缘层具有穿透绝缘层并暴露一部分下导电图案的接触孔，催化图案具有第一部分在暴露部分上 下导电图案和接触孔的侧壁上的第二部分，在接触孔的侧壁上的间隔件，其中催化剂图案的第二部分设置在间隔件和侧壁之间，接触插塞在接触孔中 并使催化剂图案接触，所述接触塞是碳纳米管材料。