公开(公告)号：US08653622B2

公开(公告)日：2014-02-18

申请号：US13038117

申请日：2011-03-01

申请人： Woo-Song Ahn ,  Satoru Yamada ,  Young-Jin Choi ,  Seung-Uk Han ,  Kyo-Suk Chae

发明人： Woo-Song Ahn ,  Satoru Yamada ,  Young-Jin Choi ,  Seung-Uk Han ,  Kyo-Suk Chae

IPC分类号： H01L29/792 ,  H01L23/525

CPC分类号： H01L29/792 ,  H01L21/28273 ,  H01L21/28282 ,  H01L23/5256 ,  H01L27/105 ,  H01L27/10897 ,  H01L27/11526 ,  H01L27/11573 ,  H01L29/42336 ,  H01L29/42352 ,  H01L29/66825 ,  H01L29/66833 ,  H01L29/7881 ,  H01L2924/0002 ,  H01L2924/00

摘要： A semiconductor device is disclosed. The semiconductor device includes a semiconductor substrate, a first node impurity region, a second node impurity region, a third node impurity region, and an insulating layer. The first through third node impurity regions are disposed in the semiconductor substrate. Each of the first through third node impurity regions has a longitudinal length, a transverse length and a thickness respectively corresponding to first through third directions, which are perpendicular with respect to each other. The first node impurity region is parallel to the second and third node impurity regions, which are disposed in the substantially same line. The insulating layer is located between the first through third node impurity regions in the semiconductor substrate.

摘要翻译： 公开了一种半导体器件。 半导体器件包括半导体衬底，第一晶体杂质区，第二晶体杂质区，第三晶体杂质区和绝缘层。 第一至第三晶体杂质区设置在半导体衬底中。 第一至第三节点杂质区域中的每一个具有分别相对于彼此垂直的第一至第三方向的纵向长度，横向长度和厚度。 第一节点杂质区域平行于第二和第三节点杂质区域，其被布置在基本相同的线上。 绝缘层位于半导体衬底中的第一至第三结点杂质区之间。

公开(公告)号：US08669165B2

公开(公告)日：2014-03-11

申请号：US13216706

申请日：2011-08-24

申请人： Seung-Uk Han ,  Nam-Ho Jeon ,  Satoru Yamada ,  Young-Jin Choi

发明人： Seung-Uk Han ,  Nam-Ho Jeon ,  Satoru Yamada ,  Young-Jin Choi

IPC分类号： H01L21/02

CPC分类号： H01L27/10894 ,  H01L21/28176 ,  H01L21/3003 ,  H01L27/10808 ,  H01L27/10852

摘要： A method of fabricating a semiconductor device is disclosed, the method generally including the steps of: forming a gate dielectric layer on a semiconductor substrate; forming a gate electrode on the gate dielectric layer; forming an etch stop layer on the gate electrode; forming a capacitor on the semiconductor substrate adjacent to the gate electrode; after forming the capacitor, forming a contact hole passing through the etch stop layer on the gate electrode; and, diffusing deuterium into the gate dielectric layer through the contact hole.

摘要翻译： 公开了制造半导体器件的方法，该方法通常包括以下步骤：在半导体衬底上形成栅介质层; 在所述栅极电介质层上形成栅电极; 在栅电极上形成蚀刻停止层; 在与栅电极相邻的半导体衬底上形成电容器; 在形成电容器之后，形成穿过栅电极上的蚀刻停止层的接触孔; 并且通过接触孔将氘扩散到栅极电介质层中。

公开(公告)号：US20120280310A1

公开(公告)日：2012-11-08

申请号：US13456261

申请日：2012-04-26

申请人： Seung-Uk HAN ,  Satoru Yamada

发明人： Seung-Uk HAN ,  Satoru Yamada

IPC分类号： H01L29/78 ,  H01L21/336

CPC分类号： H01L29/4236 ,  H01L21/2652 ,  H01L21/2658 ,  H01L21/76224 ,  H01L29/66621

摘要： A semiconductor device including an isolation layer structure including a doped polysilicon layer pattern doped with first and second impurities of first and second conductivity types at lower and upper portions thereof, the doped polysilicon layer pattern being on an inner wall of a first trench on a substrate including an active region in which the first trench is not formed and a field region including the first trench, and an insulation structure filling a remaining portion of the first trench; a gate structure on the active region; a well region at a portion of the active region adjacent to lower portions of the doped polysilicon layer pattern and being doped with third impurities of the second conductivity type; and a source/drain at a portion of the active region adjacent to upper portions of the doped polysilicon layer pattern and being doped with fourth impurities of the first conductivity type.

摘要翻译： 一种包括隔离层结构的半导体器件，所述隔离层结构包括在其下部和上部掺杂有第一和第二导电类型的第一和第二杂质的掺杂多晶硅层图案，所述掺杂多晶硅层图案位于衬底上的第一沟槽的内壁上 包括不形成第一沟槽的有源区和包括第一沟槽的场区，以及填充第一沟槽的剩余部分的绝缘结构; 活动区域上的栅极结构; 在有源区的与掺杂多晶硅层图案的下部相邻并且掺杂有第二导电类型的第三杂质的部分的阱区; 以及在有源区的与掺杂多晶硅层图案的上部相邻并且掺杂有第一导电类型的第四杂质的部分处的源极/漏极。

公开(公告)号：US20120142160A1

公开(公告)日：2012-06-07

申请号：US13216706

申请日：2011-08-24

申请人： Seung-Uk Han ,  Nam-Ho Jeon ,  Satoru Yamada ,  Young-Jin Choi

发明人： Seung-Uk Han ,  Nam-Ho Jeon ,  Satoru Yamada ,  Young-Jin Choi

IPC分类号： H01L21/02 ,  H01L21/28

CPC分类号： H01L27/10894 ,  H01L21/28176 ,  H01L21/3003 ,  H01L27/10808 ,  H01L27/10852

摘要： A method of fabricating a semiconductor device is disclosed, the method generally including the steps of: forming a gate dielectric layer on a semiconductor substrate;forming a gate electrode on the gate dielectric layer;forming an etch stop layer on the gate electrode;forming a capacitor on the semiconductor substrate adjacent to the gate electrode;after forming the capacitor, forming a contact hole passing through the etch stop layer on the gate electrode;and, diffusing deuterium into the gate dielectric layer through the contact hole.

摘要翻译： 公开了一种制造半导体器件的方法，所述方法通常包括以下步骤：在半导体衬底上形成栅极电介质层;在栅极电介质层上形成栅电极;在栅电极上形成蚀刻停止层; 在形成电容器之后形成穿过栅电极上的蚀刻停止层的接触孔;以及通过接触孔将氘扩散到栅介质层中。

公开(公告)号：US20110241099A1

公开(公告)日：2011-10-06

申请号：US13038117

申请日：2011-03-01

申请人： Woo-Song Ahn ,  Satoru Yamada ,  Young-Jin Choi ,  Seung-Uk Han ,  Kyo-Suk Chae

发明人： Woo-Song Ahn ,  Satoru Yamada ,  Young-Jin Choi ,  Seung-Uk Han ,  Kyo-Suk Chae

IPC分类号： H01L29/792 ,  H01L23/525

CPC分类号： H01L29/792 ,  H01L21/28273 ,  H01L21/28282 ,  H01L23/5256 ,  H01L27/105 ,  H01L27/10897 ,  H01L27/11526 ,  H01L27/11573 ,  H01L29/42336 ,  H01L29/42352 ,  H01L29/66825 ,  H01L29/66833 ,  H01L29/7881 ,  H01L2924/0002 ,  H01L2924/00

摘要： A semiconductor device is disclosed. The semiconductor device includes a semiconductor substrate, a first node impurity region, a second node impurity region, a third node impurity region, and an insulating layer. The first through third node impurity regions are disposed in the semiconductor substrate. Each of the first through third node impurity regions has a longitudinal length, a transverse length and a thickness respectively corresponding to first through third directions, which are perpendicular with respect to each other. The first node impurity region is parallel to the second and third node impurity regions, which are disposed in the substantially same line. The insulating layer is located between the first through third node impurity regions in the semiconductor substrate.

摘要翻译： 公开了一种半导体器件。 半导体器件包括半导体衬底，第一晶体杂质区，第二晶体杂质区，第三晶体杂质区和绝缘层。 第一至第三晶体杂质区设置在半导体衬底中。 第一至第三节点杂质区域中的每一个具有分别相对于彼此垂直的第一至第三方向的纵向长度，横向长度和厚度。 第一节点杂质区域平行于第二和第三节点杂质区域，其被布置在基本相同的线上。 绝缘层位于半导体衬底中的第一至第三结点杂质区之间。

公开(公告)号：US08610239B2

公开(公告)日：2013-12-17

申请号：US13456261

申请日：2012-04-26

申请人： Seung-Uk Han ,  Satoru Yamada

发明人： Seung-Uk Han ,  Satoru Yamada

IPC分类号： H01L21/70

CPC分类号： H01L29/4236 ,  H01L21/2652 ,  H01L21/2658 ,  H01L21/76224 ,  H01L29/66621

摘要： A semiconductor device including an isolation layer structure including a doped polysilicon layer pattern doped with first and second impurities of first and second conductivity types at lower and upper portions thereof, the doped polysilicon layer pattern being on an inner wall of a first trench on a substrate including an active region in which the first trench is not formed and a field region including the first trench, and an insulation structure filling a remaining portion of the first trench; a gate structure on the active region; a well region at a portion of the active region adjacent to lower portions of the doped polysilicon layer pattern and being doped with third impurities of the second conductivity type; and a source/drain at a portion of the active region adjacent to upper portions of the doped polysilicon layer pattern and being doped with fourth impurities of the first conductivity type.

摘要翻译： 一种包括隔离层结构的半导体器件，所述隔离层结构包括在其下部和上部掺杂有第一和第二导电类型的第一和第二杂质的掺杂多晶硅层图案，所述掺杂多晶硅层图案位于衬底上的第一沟槽的内壁上 包括不形成第一沟槽的有源区和包括第一沟槽的场区，以及填充第一沟槽的剩余部分的绝缘结构; 活动区域上的栅极结构; 在有源区的与掺杂多晶硅层图案的下部相邻并且掺杂有第二导电类型的第三杂质的部分的阱区; 以及在有源区的与掺杂多晶硅层图案的上部相邻并且掺杂有第一导电类型的第四杂质的部分处的源极/漏极。

公开(公告)号：US08864060B2

公开(公告)日：2014-10-21

申请号：US13449976

申请日：2012-04-18

申请人： Satoru Yamada ,  Yoshiyuki Hatayama

发明人： Satoru Yamada ,  Yoshiyuki Hatayama

IPC分类号： B21H3/04 ,  B65H18/28 ,  B65H75/18 ,  H01F27/28 ,  H01F27/26 ,  H01F41/06 ,  H01F17/04

CPC分类号： H01F27/29 ,  H01F27/2823 ,  H01F41/064 ,  H01F41/071 ,  H01F2017/048

摘要： A coil component includes an air-core winding wire portion wound by a wire with a plurality of wound layers by alignment winding, a spiral shaped wound portion in which the wire wound in a spiral shape from an inner edge of an end surface toward an outer edge thereof along the end surface while in contact with the end surface on one side in the axis direction of the winding wire portion, a first lead portion extended and extracted outward from a winding first end point of the spiral shaped wound portion, and a second lead portion extended and extracted outward from a winding second end point at the outer circumference of the winding wire portion.

摘要翻译： 线圈部件包括由具有通过对准绕组的多个卷绕层的线缠绕的空心绕组线，螺旋形缠绕部分，其中线从端表面的内边缘向外部缠绕成螺旋形状 其沿着所述端面与所述绕线部的轴线方向的一侧的端面接触，从所述螺旋状卷绕部的卷绕的第一端部向外延伸并向外伸出的第一引导部， 引线部分从卷绕线部分的外周上的绕组第二端点向外延伸和提取。

公开(公告)号：US08385077B2

公开(公告)日：2013-02-26

申请号：US12900390

申请日：2010-10-07

申请人： Satoru Yamada

发明人： Satoru Yamada

IPC分类号： H05K1/14 ,  H05K7/16 ,  H05K5/00 ,  H05K7/14

CPC分类号： G11B33/128 ,  G11B33/122 ,  G11B33/126

摘要： An electronic device includes a housing having an accommodation space, a first support body being slidably insertable into the accommodation space in parallel with a predetermined plane, a second support body coupled with the first support body rotatably around a rotation axis parallel to a front side of the housing and being rotatable between a reference attitude disposed in the same plane with respect to the first support body and an inclined attitude disposed at a given angle with respect to the first support body, and a drive mechanism for changing the attitude of the second support body.

摘要翻译： 电子设备包括具有容纳空间的壳体，与预定平面平行地可滑动地插入到容纳空间中的第一支撑体;与第一支撑体可旋转地围绕平行于预定平面的旋转轴线可旋转地连接的第二支撑体 所述壳体能够相对于所述第一支撑体设置在同一平面中的基准姿态和相对于所述第一支撑体以给定角度设置的倾斜姿态之间旋转;以及驱动机构，用于改变所述第二支撑件的姿态 身体。

公开(公告)号：US08368169B2

公开(公告)日：2013-02-05

申请号：US12897095

申请日：2010-10-04

申请人： Seunguk Han ,  Satoru Yamada ,  Young Jin Choi

发明人： Seunguk Han ,  Satoru Yamada ,  Young Jin Choi

IPC分类号： H01L21/70

CPC分类号： H01L21/823481 ,  H01L21/76229 ,  H01L21/823425

摘要： An example semiconductor device includes a trench formed in a semiconductor substrate to define an active region, a filling dielectric layer provided within the trench, an oxide layer provided between the filling dielectric layer and the trench, a nitride layer provided between the oxide layer and the filling dielectric layer, and a barrier layer provided between the oxide layer and the nitride layer.

摘要翻译： 示例性半导体器件包括形成在半导体衬底中以限定有源区的沟槽，设置在沟槽内的填充介电层，设置在填充介电层和沟槽之间的氧化物层，设置在氧化物层和 填充介电层，以及设置在氧化物层和氮化物层之间的阻挡层。

公开(公告)号：US20120251171A1

公开(公告)日：2012-10-04

申请号：US13523763

申请日：2012-06-14

申请人： Norifumi Muranaka ,  Satoru Yamada ,  Kazuhiro Yamauchi ,  Seiji Tsuru ,  Yuka Muranaka

发明人： Norifumi Muranaka ,  Satoru Yamada ,  Kazuhiro Yamauchi ,  Seiji Tsuru ,  Yuka Muranaka

IPC分类号： G03G21/18 ,  B32B25/00 ,  G03G15/00

CPC分类号： G03G15/0233 ,  B05D3/007 ,  B32B1/08 ,  B32B15/06 ,  B32B15/18 ,  B32B25/02 ,  B32B25/14 ,  B32B2264/104 ,  B32B2264/108 ,  B32B2307/202 ,  B32B2457/00 ,  G03G15/0818 ,  G03G15/1685 ,  Y10T428/31855

摘要： Provided is such a conductive member that a change in its electrical resistance value caused by its long-term use is reduced to the extent possible. The conductive member has a conductive support and a conductive layer, the conductive layer contains a rubber composition formed of a modified epichlorohydrin rubber, and the modified epichlorohydrin rubber has a unit represented by the following formula (1). In the formula (1), R1, R2, and R3 each independently represent hydrogen or a saturated hydrocarbon group having 1 to 18 carbon atoms.

摘要翻译： 提供这样的导电构件，其长期使用引起的其电阻值的变化尽可能地减小。 导电构件具有导电性支撑体和导电层，导电层含有由改性表氯醇橡胶形成的橡胶组合物，改性表氯醇橡胶具有下述式（1）表示的单元。 在式（1）中，R 1，R 2和R 3各自独立地表示氢或碳原子数1〜18的饱和烃基。