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公开(公告)号：US09735186B2
公开(公告)日：2017-08-15
申请号：US14781309
申请日：2015-07-27
Inventor： Xiaoxing Zhang
IPC: H01L27/12 , H01L29/49 , H01L29/786
CPC classification number: H01L27/1277 , H01L27/1222 , H01L27/1288 , H01L29/4908 , H01L29/66757 , H01L29/768 , H01L29/78603 , H01L29/78675
Abstract: The disclosure provides a manufacturing method and a structure thereof of a TFT backplane. In the manufacturing method of the TFT backplane, after a polysilicon layer (3′) is formed by implanting a induced ion solid-phase crystallization into an amorphous silicon layer (3), patterning the polysilicon layer using a half-tone mask to form an island active layer (4), and at the same time, etching a upper layer portion (31) with more implanted induced ions located in the middle portion of the island active layer (4) to form a channel region, retaining the upper layer portion (31) with more implanted induced ions located in two sides of the island active layer (4) to form a source/drain contact region, it not only reduces the number of masks, but also saves a process only for implanting doped ion into the source/drain contact region, thereby simplifying the process and reducing production cost.
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公开(公告)号：US20180204897A1
公开(公告)日：2018-07-19
申请号：US15120745
申请日：2016-06-27
Inventor： Xingyu Zhou , Xiaoxing Zhang , Yuanjun Hsu , Yadi Zhang
IPC: H01L27/32 , H01L21/02 , H01L27/12 , H01L29/786 , H01L29/167 , H01L29/24 , H01L29/66 , H01L51/52 , H01L51/00
CPC classification number: H01L27/3262 , H01L21/02043 , H01L21/02164 , H01L21/0217 , H01L21/02422 , H01L21/02532 , H01L21/02565 , H01L21/02592 , H01L21/02667 , H01L21/77 , H01L27/12 , H01L27/1218 , H01L27/1222 , H01L27/1225 , H01L27/1248 , H01L27/1251 , H01L27/1255 , H01L27/1274 , H01L27/3246 , H01L27/3248 , H01L27/3258 , H01L27/3265 , H01L29/167 , H01L29/24 , H01L29/66757 , H01L29/66969 , H01L29/78675 , H01L29/78696 , H01L51/0096 , H01L51/5206 , H01L2227/323 , H01L2251/308
Abstract: The present invention provides a manufacture method of an AMOLED pixel driving circuit. The method utilizes the oxide semiconductor thin film transistor to be the switch thin film transistor of the AMOLED pixel driving circuit to reduce the leakage current of the switch thin film transistor, and the P type polysilicon thin film transistor manufactured by utilizing the Solid Phase Crystallization is employed to be the drive thin film transistor of the AMOLED pixel driving circuit to promote the mobility, the equality and the reliability of the drive thin film transistor, and utilizing the P type thin film transistor to be the drive thin film transistor can form the constant current type OLED element, which is more stable than the source follower type OLED formed by the N type thin film transistor, and meanwhile, the parasitic capacitance is decreased with the top gate structure.
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公开(公告)号：US20180034006A1
公开(公告)日：2018-02-01
申请号：US14912927
申请日：2016-01-29
Inventor： Xiaoxing Zhang
CPC classification number: H01L51/56 , H01L21/77 , H01L27/1274 , H01L27/1277 , H01L27/1288 , H01L27/3246 , H01L27/3248 , H01L27/3258 , H01L29/495 , H01L29/513 , H01L29/518 , H01L29/66757 , H01L51/5221
Abstract: The present invention provides a method for manufacturing a TFT substrate, in which after induced crystallization is conducted by implanting ions into an amorphous silicon layer, there is no need to completely remove the ion induction layer formed on the surface of a poly-silicon layer so obtained and instead, a half-tone mask based operation is applied to remove only a portion of the ion induction layer corresponding to a channel zone and there is no need for re-conducting ion implantation subsequently for source/drain contact zones, thereby saving the mask necessary for re-conducting ion implantation. Further, the source/drain electrodes are also formed with the half-tone mask based operation so as to save the mask necessary for making the source/drain electrodes. Further, the source/drain electrodes are formed first so that the formation of an interlayer insulation layer can be omitted thereby saving the mask necessary for forming the interlayer insulation layer. Through the adoption of a half-tone mask base operation, the method for manufacturing a TFT substrate according to the present invention can reduce the nine masks that are involved in the prior art techniques to only six masks, thereby effectively simplifying the manufacturing process, improving manufacturing efficiency, and saving manufacturing cost.
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公开(公告)号：US09876040B1
公开(公告)日：2018-01-23
申请号：US14912927
申请日：2016-01-29
Inventor： Xiaoxing Zhang
IPC: H01L27/32 , H01L29/786 , H01L27/12 , H01L29/66
CPC classification number: H01L51/56 , H01L21/77 , H01L27/1274 , H01L27/1277 , H01L27/1288 , H01L27/3246 , H01L27/3248 , H01L27/3258 , H01L29/495 , H01L29/513 , H01L29/518 , H01L29/66757 , H01L51/5221
Abstract: The present invention provides a method for manufacturing a TFT substrate, in which after induced crystallization is conducted by implanting ions into an amorphous silicon layer, there is no need to completely remove the ion induction layer formed on the surface of a poly-silicon layer so obtained and instead, a half-tone mask based operation is applied to remove only a portion of the ion induction layer corresponding to a channel zone and there is no need for re-conducting ion implantation subsequently for source/drain contact zones, thereby saving the mask necessary for re-conducting ion implantation. Further, the source/drain electrodes are also formed with the half-tone mask based operation so as to save the mask necessary for making the source/drain electrodes. Further, the source/drain electrodes are formed first so that the formation of an interlayer insulation layer can be omitted thereby saving the mask necessary for forming the interlayer insulation layer. Through the adoption of a half-tone mask base operation, the method for manufacturing a TFT substrate according to the present invention can reduce the nine masks that are involved in the prior art techniques to only six masks, thereby effectively simplifying the manufacturing process, improving manufacturing efficiency, and saving manufacturing cost.
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公开(公告)号：US20170352711A1
公开(公告)日：2017-12-07
申请号：US15120748
申请日：2016-06-27
Inventor： Xiaoxing Zhang , Xingyu Zhou , Yuanjun Hsu
CPC classification number: H01L27/3262 , H01L27/1222 , H01L27/1225 , H01L27/1255 , H01L27/127
Abstract: The present invention provides a manufacture method of a TFT backplate and a TFT backplate. By utilizing the oxide semiconductor to manufacture the switch TFT, and utilizing the advantages of rapid switch and lower leakage current of the oxide semiconductor, the switch speed of the switch TFT is raised and the leakage current is lowered; by utilizing the polysilicon to manufacture the drive TFT, and utilizing the properties of higher electron mobility and the uniform grain of the polysilicon, the electron mobility and the current output consistency of the drive TFT is promoted. These are beneficial for the promotion of the light uniformity of the OLED element.
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Patent Agency Ranking
公开(公告)号：US20170155002A1
公开(公告)日：2017-06-01
申请号：US14786550
申请日：2015-08-24
Inventor： Xingyu Zhou , Xiaoxing Zhang
IPC: H01L29/786 , H01L21/311 , H01L29/423 , H01L29/06 , H01L29/66
CPC classification number: H01L29/78675 , H01L21/31111 , H01L29/06 , H01L29/0688 , H01L29/42384 , H01L29/4908 , H01L29/66757 , H01L29/78624 , H01L29/78696 , H01L2029/42388
Abstract: The present invention provides a manufacture method of a LTPS thin film transistor and a LTPS thin film transistor. The gate isolation layer is first etched to form the recess, and then the gate is formed on the recess so that the width of the gate is slightly larger than the width of the recess. Then, the active layer is implemented with ion implantation to form the source contact region, the drain contact region, the channel region and one transition region at least located between the drain contact region and the channel region. The gate isolation layer above the transition region is thicker than the channel region and can shield a part of the gate electrical field to make the carrier density here lower than the channel region to form a transition.
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公开(公告)号：US20180083052A1
公开(公告)日：2018-03-22
申请号：US15823514
申请日：2017-11-27
Inventor： Xiaoxing Zhang
IPC: H01L27/12 , H01L29/786 , H01L27/32
CPC classification number: H01L27/1296 , H01L27/1218 , H01L27/1222 , H01L27/124 , H01L27/1262 , H01L27/1274 , H01L27/1281 , H01L27/3262 , H01L29/78675 , H01L29/78696
Abstract: A method for manufacturing a LTPS TFT substrate is provided. Buffer layers are respectively provided in a drive TFT area and a display TFT area and have different thicknesses, such that the thickness of the buffer layer in the drive TFT area is larger than the thickness of the buffer layer in the display TFT area so that different temperature grades are formed in a crystallization process of poly-silicon to achieve control of the grain diameters of crystals. A poly-silicon layer that is formed in the drive TFT area in the crystallization process has a large lattice dimension to increase electron mobility thereof. Fractured crystals can be formed in a poly-silicon layer of the display TFT area in the crystallization process for ensuring the uniformity of the grain boundary and increasing the uniformity of electrical current. Accordingly, the electrical property demands for different TFTs can be satisfied.
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公开(公告)号：US09786789B2
公开(公告)日：2017-10-10
申请号：US14786550
申请日：2015-08-24
Inventor： Xingyu Zhou , Xiaoxing Zhang
IPC: H01L29/10 , H01L29/76 , H01L31/036 , H01L31/112 , H01L29/786 , H01L29/06 , H01L29/66 , H01L29/423 , H01L21/311
CPC classification number: H01L29/78675 , H01L21/31111 , H01L29/06 , H01L29/0688 , H01L29/42384 , H01L29/4908 , H01L29/66757 , H01L29/78624 , H01L29/78696 , H01L2029/42388
Abstract: The present invention provides a manufacture method of a LTPS thin film transistor and a LTPS thin film transistor. The gate isolation layer is first etched to form the recess, and then the gate is formed on the recess so that the width of the gate is slightly larger than the width of the recess. Then, the active layer is implemented with ion implantation to form the source contact region, the drain contact region, the channel region and one transition region at least located between the drain contact region and the channel region. The gate isolation layer above the transition region is thicker than the channel region and can shield a part of the gate electrical field to make the carrier density here lower than the channel region to form a transition.
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公开(公告)号：US10305049B2
公开(公告)日：2019-05-28
申请号：US15508099
申请日：2017-02-14
Inventor： Xiaoxing Zhang
Abstract: The present invention provides an OLED substrate and a manufacture method thereof. In the manufacture method of the OLED substrate of the present invention, by configuring the silicon film on the top surface of the pixel definition layer to make the top surface possess the excellent hydrophobic characteristic, the OLED material mistakenly sprayed onto the silicon film of the top surface does not stay on the silicon film but quickly falls into the pixel region of the substrate when the OLED material is ink jet printed in the pixel regions of the substrate to effectively prevent the issue that the OLED material stays on the top surface of the pixel definition layer or even slides into the adjacent pixel region to result in color mixing. In the OLED substrate, the color purity of the OLED light emitting layer is high and there is no problem of color mixing.
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公开(公告)号：US10192903B2
公开(公告)日：2019-01-29
申请号：US15323648
申请日：2016-09-28
Inventor： Xiaoxing Zhang , Xingyu Zhou , Yuan Jun Hsu
IPC: H01L27/12 , H01L21/02 , H01L21/77 , H01L21/265 , H01L21/3115 , H01L27/32 , H01L29/167 , H01L29/423 , H01L51/56 , H01L29/66 , H01L29/786
Abstract: A method for manufacturing a TFT substrate is disclosed. The TFT substrate includes a drive TFT region and a display TFT region. The drive TFT region and the display TFT region are manufactured with different technologies, so that different requirements for TFT can be met. The manufacturing method according to the present disclosure mainly includes: forming a first amorphous silicon layer to obtain a drive TFT region; forming a second amorphous silicon layer to obtain a display TFT region; and then depositing a passivation layer and a flat layer, so that the TFT substrate is manufactured after following treatment steps.
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