公开(公告)号：US20110186862A1

公开(公告)日：2011-08-04

申请号：US13063083

申请日：2009-02-03

申请人： Shin Harada ,  Takeyoshi Masuda ,  Keiji Wada ,  Masato Tsumori

发明人： Shin Harada ,  Takeyoshi Masuda ,  Keiji Wada ,  Masato Tsumori

IPC分类号： H01L29/24 ,  H01L21/20 ,  B82Y99/00 ,  B82Y40/00

CPC分类号： H01L29/1608 ,  H01L21/02378 ,  H01L21/02433 ,  H01L21/02447 ,  H01L21/02529 ,  H01L21/3003 ,  H01L21/324 ,  H01L29/045 ,  H01L29/0878 ,  H01L29/36 ,  H01L29/6606 ,  H01L29/66068 ,  H01L29/7802 ,  H01L29/94

摘要： There is provided a silicon carbide semiconductor device having excellent electrical characteristics such as channel mobility, and a method for manufacturing the same. A semiconductor device includes a substrate made of silicon carbide and having an off-angle of greater than or equal to 50° and less than or equal to 65° with respect to a surface orientation of {0001}, a p-type layer serving as a semiconductor layer, and an oxide film serving as an insulating film. The p-type layer is formed on the substrate and is made of silicon carbide. The oxide film is formed to contact with a surface of the p-type layer. A maximum value of the concentration of nitrogen atoms in a region within 10 nm of an interface between the semiconductor layer and the insulating film (interface between a channel region and the oxide film) is greater than or equal to 1×1021 cm−3.

摘要翻译： 提供了具有优异的电特性如沟道迁移率的碳化硅半导体器件及其制造方法。 半导体器件包括相对于{0001}的表面取向具有大于或等于50°且小于或等于65°的偏角度的碳化硅制成的衬底，用作 半导体层和用作绝缘膜的氧化膜。 p型层形成在基板上，由碳化硅制成。 氧化膜形成为与p型层的表面接触。 半导体层与绝缘膜（沟道区域和氧化物膜之间的界面）的界面的10nm以内的区域的氮原子的浓度的最大值为1×1021cm-3以上。

公开(公告)号：US08686434B2

公开(公告)日：2014-04-01

申请号：US13063083

申请日：2009-02-03

申请人： Shin Harada ,  Takeyoshi Masuda ,  Keiji Wada ,  Masato Tsumori

发明人： Shin Harada ,  Takeyoshi Masuda ,  Keiji Wada ,  Masato Tsumori

IPC分类号： H01L29/06

CPC分类号： H01L29/1608 ,  H01L21/02378 ,  H01L21/02433 ,  H01L21/02447 ,  H01L21/02529 ,  H01L21/3003 ,  H01L21/324 ,  H01L29/045 ,  H01L29/0878 ,  H01L29/36 ,  H01L29/6606 ,  H01L29/66068 ,  H01L29/7802 ,  H01L29/94

摘要： There is provided a silicon carbide semiconductor device having excellent electrical characteristics such as channel mobility, and a method for manufacturing the same. A semiconductor device includes a substrate made of silicon carbide and having an off-angle of greater than or equal to 50° and less than or equal to 65° with respect to a surface orientation of {0001}, a p-type layer serving as a semiconductor layer, and an oxide film serving as an insulating film. The p-type layer is formed on the substrate and is made of silicon carbide. The oxide film is formed to contact with a surface of the p-type layer. A maximum value of the concentration of nitrogen atoms in a region within 10 nm of an interface between the semiconductor layer and the insulating film (interface between a channel region and the oxide film) is greater than or equal to 1×1021 cm−3.

摘要翻译： 提供了具有优异的电特性如沟道迁移率的碳化硅半导体器件及其制造方法。 半导体器件包括相对于{0001}的表面取向具有大于或等于50°且小于或等于65°的偏角度的碳化硅制成的衬底，用作 半导体层和用作绝缘膜的氧化膜。 p型层形成在基板上，由碳化硅制成。 氧化膜形成为与p型层的表面接触。 半导体层与绝缘膜（沟道区域和氧化物膜之间的界面）的界面的10nm以内的区域的氮原子的浓度的最大值为1×1021cm-3以上。

公开(公告)号：US20120326166A1

公开(公告)日：2012-12-27

申请号：US13529602

申请日：2012-06-21

申请人： Takeyoshi Masuda ,  Shin Harada ,  Keiji Wada ,  Toru Hiyoshi

发明人： Takeyoshi Masuda ,  Shin Harada ,  Keiji Wada ,  Toru Hiyoshi

IPC分类号： H01L29/24 ,  H01L21/336 ,  H01L29/78

CPC分类号： H01L29/7802 ,  H01L21/049 ,  H01L21/3065 ,  H01L29/045 ,  H01L29/0623 ,  H01L29/0696 ,  H01L29/1608 ,  H01L29/66068 ,  H01L29/7395 ,  H01L29/7397 ,  H01L29/7813

摘要： A substrate has a surface made of a semiconductor having a hexagonal single-crystal structure of polytype 4H. The surface of the substrate is constructed by alternately providing a first plane having a plane orientation of (0-33-8), and a second plane connected to the first plane and having a plane orientation different from the plane orientation of the first plane. A gate insulating film is provided on the surface of the substrate. A gate electrode is provided on the gate insulating film.

摘要翻译： 衬底具有由具有多晶型4H的六方晶单晶结构的半导体制成的表面。 基板的表面通过交替地提供具有（0-33-8）的平面取向的第一平面和连接到第一平面并具有不同于第一平面的平面取向的平面取向的第二平面来构造。 栅极绝缘膜设置在基板的表面上。 在栅极绝缘膜上设置栅电极。

公开(公告)号：US20120228640A1

公开(公告)日：2012-09-13

申请号：US13512456

申请日：2011-07-14

申请人： Takeyoshi Masuda ,  Shin Harada ,  Misako Honaga ,  Keiji Wada ,  Toru Hiyoshi

发明人： Takeyoshi Masuda ,  Shin Harada ,  Misako Honaga ,  Keiji Wada ,  Toru Hiyoshi

IPC分类号： H01L29/24 ,  H01L21/04

CPC分类号： H01L29/66068 ,  H01L21/046 ,  H01L21/0475 ,  H01L21/3065 ,  H01L29/045 ,  H01L29/0615 ,  H01L29/0619 ,  H01L29/0623 ,  H01L29/0657 ,  H01L29/0661 ,  H01L29/0696 ,  H01L29/1608 ,  H01L29/4236 ,  H01L29/6606 ,  H01L29/7397 ,  H01L29/7813 ,  H01L29/8613 ,  H01L29/868

摘要： There are provided a high-quality semiconductor device having stable characteristics and a method for manufacturing such a semiconductor device. The semiconductor device includes: a substrate having a main surface; and a silicon carbide layer formed on the main surface of the substrate and including a side surface inclined relative to the main surface. The side surface substantially includes a {03-3-8} plane. The side surface includes a channel region.

摘要翻译： 提供了具有稳定特性的高质量半导体器件和制造这种半导体器件的方法。 半导体器件包括：具有主表面的衬底; 以及形成在所述基板的主表面上并且包括相对于所述主表面倾斜的侧表面的碳化硅层。 侧表面基本上包括{03-3-8}平面。 侧面包括通道区域。

公开(公告)号：US08513676B2

公开(公告)日：2013-08-20

申请号：US13512459

申请日：2010-12-17

申请人： Shin Harada ,  Toru Hiyoshi ,  Keiji Wada ,  Takeyoshi Masuda

发明人： Shin Harada ,  Toru Hiyoshi ,  Keiji Wada ,  Takeyoshi Masuda

IPC分类号： H01L29/38

CPC分类号： H01L29/7802 ,  H01L21/02378 ,  H01L21/02433 ,  H01L21/02447 ,  H01L21/02529 ,  H01L21/02609 ,  H01L21/049 ,  H01L21/2007 ,  H01L29/045 ,  H01L29/1608 ,  H01L29/518 ,  H01L29/66068 ,  H01L29/94

摘要： A semiconductor device includes: a substrate made of silicon carbide and having a main surface having an off angle of not less than −3° and not more than +5° relative to a (0-33-8) plane in a direction; a p type layer made of silicon carbide and formed on the main surface of the substrate by means of epitaxial growth; and an oxide film formed in contact with a surface of the p type layer. A maximum value of nitrogen atom concentration is 1×1021 cm−3 or greater in a region within 10 nm from an interface between the p type layer and the oxide film.

摘要翻译： 一种半导体器件包括：由碳化硅制成的衬底，其具有相对于（0-33-8）面的偏离角不小于-3°且不大于+ 5°的主表面， 10方向; 由碳化硅制成的p型层，通过外延生长形成在衬底的主表面上; 以及形成为与p型层的表面接触的氧化物膜。 在p型层和氧化膜之间的界面10nm以内的区域中，氮原子浓度的最大值为1×1021cm-3以上。

公开(公告)号：US08513673B2

公开(公告)日：2013-08-20

申请号：US13120890

申请日：2010-03-23

申请人： Keiji Wada ,  Shin Harada ,  Takeyoshi Masuda ,  Misako Honaga

发明人： Keiji Wada ,  Shin Harada ,  Takeyoshi Masuda ,  Misako Honaga

IPC分类号： H01L29/15 ,  H01L31/0312

CPC分类号： H01L29/045 ,  H01L29/1608 ,  H01L29/66068 ,  H01L29/78

摘要： A MOSFET includes a silicon carbide (SiC) substrate having a main surface having an off angle of not less than 50° and not more than 65° relative to a {0001} plane; a semiconductor layer formed on the main surface of the SiC substrate; and an insulating film formed in contact with a surface of the semiconductor layer. When the insulating film has a thickness of not less than 30 nm and not more than 46 nm, the threshold voltage thereof is not more than 2.3V. When the insulating film has a thickness of more than 46 nm and not more than 100 nm, the threshold voltage thereof is more than 2.3 V and not more than 4.9 V.

摘要翻译： MOSFET包括碳化硅（SiC）基板，其具有相对于{0001}面具有不小于50°且不大于65°的偏离角的主表面; 形成在所述SiC衬底的主表面上的半导体层; 以及与半导体层的表面接触形成的绝缘膜。 当绝缘膜的厚度不小于30nm且不大于46nm时，其阈值电压不大于2.3V。 当绝缘膜的厚度大于46nm且不大于100nm时，其阈值电压大于2.3V且不大于4.9V。

公开(公告)号：US20120235165A1

公开(公告)日：2012-09-20

申请号：US13512459

申请日：2010-12-17

申请人： Shin Harada ,  Toru ` Hiyoshi ,  Keiji Wada ,  Takeyoshi Masuda

发明人： Shin Harada ,  Toru ` Hiyoshi ,  Keiji Wada ,  Takeyoshi Masuda

IPC分类号： H01L29/38 ,  H01L21/20

CPC分类号： H01L29/7802 ,  H01L21/02378 ,  H01L21/02433 ,  H01L21/02447 ,  H01L21/02529 ,  H01L21/02609 ,  H01L21/049 ,  H01L21/2007 ,  H01L29/045 ,  H01L29/1608 ,  H01L29/518 ,  H01L29/66068 ,  H01L29/94

摘要： A semiconductor device includes: a substrate made of silicon carbide and having a main surface having an off angle of not less than −° and not more than +5° relative to a (0-33-8) plane in a direction; a p type layer made of silicon carbide and formed on the main surface of the substrate by means of epitaxial growth; and an oxide film formed in contact with a surface of the p type layer. A maximum value of nitrogen atom concentration is 1×1021 cm−3 or greater in a region within 10 nm from an interface between the p type layer and the oxide film.

摘要翻译： 一种半导体器件包括：由碳化硅制成的衬底，其具有相对于（0-33-8）面在01-10°内具有不小于-0且不大于+ 5°的偏离角的主表面 方向; 由碳化硅制成的p型层，通过外延生长形成在衬底的主表面上; 以及形成为与p型层的表面接触的氧化物膜。 在p型层和氧化膜之间的界面10nm以内的区域中，氮原子浓度的最大值为1×1021cm-3以上。

公开(公告)号：US20110169016A1

公开(公告)日：2011-07-14

申请号：US13063298

申请日：2010-03-23

申请人： Keiji Wada ,  Shin Harada ,  Takeyoshi Masuda ,  Misako Honaga

发明人： Keiji Wada ,  Shin Harada ,  Takeyoshi Masuda ,  Misako Honaga

IPC分类号： H01L29/78 ,  H01L29/161 ,  H01L21/316

CPC分类号： H01L29/7802 ,  H01L29/045 ,  H01L29/0878 ,  H01L29/1095 ,  H01L29/1608 ,  H01L29/6606 ,  H01L29/66068 ,  H01L29/78 ,  H01L29/94

摘要： A MOSFET includes: a silicon carbide (SiC) substrate having a main surface having an off angle of not less than 50° and not more than 65° relative to a {0001} plane; a semiconductor layer formed on the main surface of the SiC substrate; and an insulating film formed in contact with a surface of the semiconductor layer. The MOSFET has a sub-threshold slope of not more than 0.4 V/Decade.

摘要翻译： MOSFET包括：碳化硅（SiC）基板，其具有相对于{0001}面具有不小于50°且不大于65°的偏离角的主表面; 形成在所述SiC衬底的主表面上的半导体层; 以及与半导体层的表面接触形成的绝缘膜。 MOSFET的子阈值斜率不超过0.4 V /十年。

公开(公告)号：US08536583B2

公开(公告)日：2013-09-17

申请号：US13063298

申请日：2010-03-23

申请人： Keiji Wada ,  Shin Harada ,  Takeyoshi Masuda ,  Misako Honaga

发明人： Keiji Wada ,  Shin Harada ,  Takeyoshi Masuda ,  Misako Honaga

IPC分类号： H01L29/15 ,  H01L31/0312

CPC分类号： H01L29/7802 ,  H01L29/045 ,  H01L29/0878 ,  H01L29/1095 ,  H01L29/1608 ,  H01L29/6606 ,  H01L29/66068 ,  H01L29/78 ,  H01L29/94

摘要： A MOSFET includes: a silicon carbide (SiC) substrate having a main surface having an off angle of not less than 50° and not more than 65° relative to a {0001} plane; a semiconductor layer formed on the main surface of the SiC substrate; and an insulating film formed in contact with a surface of the semiconductor layer. The MOSFET has a sub-threshold slope of not more than 0.4 V/Decade.

摘要翻译： MOSFET包括：碳化硅（SiC）基板，其具有相对于{0001}面具有不小于50°且不大于65°的偏离角的主表面; 形成在所述SiC衬底的主表面上的半导体层; 以及与半导体层的表面接触形成的绝缘膜。 MOSFET的子阈值斜率不超过0.4 V /十年。

公开(公告)号：US20120126251A1

公开(公告)日：2012-05-24

申请号：US13388691

申请日：2011-02-25

申请人： Makoto Sasaki ,  Shin Harada ,  Takeyoshi Masuda ,  Keiji Wada ,  Hiroki Inoue ,  Taro Nishiguchi ,  Kyoko Okita ,  Yasuo Namikawa ,  Taku Horii

发明人： Makoto Sasaki ,  Shin Harada ,  Takeyoshi Masuda ,  Keiji Wada ,  Hiroki Inoue ,  Taro Nishiguchi ,  Kyoko Okita ,  Yasuo Namikawa ,  Taku Horii

IPC分类号： H01L29/24 ,  H01L21/04

CPC分类号： H01L29/7802 ,  H01L21/2007 ,  H01L21/3247 ,  H01L29/045 ,  H01L29/1608 ,  H01L29/66068

摘要： A method for manufacturing a silicon carbide substrate achieves reduced manufacturing cost. The method includes the steps of: preparing a base substrate and a SiC substrate; fabricating a stacked substrate by stacking the base substrate and the SiC substrate; fabricating a connected substrate by heating the stacked substrate; transferring a void, formed at a connection interface, in a thickness direction of the connected substrate by heating the connected substrate to cause the base substrate to have a temperature higher than that of the SiC substrate; and removing the void by removing a region including a main surface of the base substrate opposite to the SiC substrate.

摘要翻译： 制造碳化硅衬底的方法降低了制造成本。 该方法包括以下步骤：制备基底和SiC衬底; 通过堆叠基底基板和SiC基板来制造堆叠的基板; 通过加热堆叠的基板来制造连接的基板; 通过加热连接的基板，在连接的基板的厚度方向上形成在连接界面处形成的空隙，使得基底基板的温度高于SiC基板的温度; 并且通过去除包括与SiC衬底相对的基底衬底的主表面的区域来去除空隙。