公开(公告)号：US5329475A

公开(公告)日：1994-07-12

申请号：US979668

申请日：1992-11-20

申请人： Tatsuro Juri ,  Shinya Kadono

发明人： Tatsuro Juri ,  Shinya Kadono

IPC分类号： G06F7/38 ,  G06F7/48 ,  H03M7/30 ,  H04N1/41 ,  H04N11/04 ,  H04N19/115 ,  H04N19/132 ,  H04N19/136 ,  H04N19/60 ,  H04N19/85 ,  H04N19/91

CPC分类号： H03M7/30 ,  G06F7/48 ,  G06F7/49952 ,  G06F7/49963

摘要： A data round-off device receives a digital input signal of m-bit form (m is an integer) which has arithmetically been processed by addition, subtraction, multiplication, and division by an orthogonal transformer or predictive encoder is summed, if it is positive, with a value of 2.sup.(n-1) -1 (n is a natural number smaller than m) and if negative, with a value of 2.sup.(n-1) and the higher (m-n) bits of a resultant sum signal are delivered as the output of the data round-off device. Preferably, it is used for control of the number of bits if there is a difference in the number of bits between the data output of an orthogonal transformer and the data input of an encoder for encoding the data output of the orthogonal transformer.

摘要翻译： 数据舍入装置接收通过正交变换器或预测编码器的加法，减法，乘法和除法进行算术处理的m位形式（m为整数）的数字输入信号，如果为正， ，其值为2（n-1）-1（n是小于m的自然数），如果为负，则所得到的和信号的值为2（n-1）和高（mn） 作为数据舍入装置的输出。 优选地，如果正交变换器的数据输出与用于编码正交变换器的数据输出的编码器的数据输入之间的位数差异，则用于控制位数。

公开(公告)号：US5193010A

公开(公告)日：1993-03-09

申请号：US574288

申请日：1990-08-28

申请人： Tatsuro Juri ,  Chiyoko Matsumi ,  Shinya Kadono ,  Hideki Ohtaka

发明人： Tatsuro Juri ,  Chiyoko Matsumi ,  Shinya Kadono ,  Hideki Ohtaka

IPC分类号： G11B20/00 ,  G11B20/18 ,  G11B27/032 ,  H04N5/926 ,  H04N5/945 ,  H04N19/89 ,  H04N19/895

CPC分类号： G11B27/032 ,  G11B20/00086 ,  G11B20/1809 ,  H04N19/142 ,  H04N19/179 ,  H04N19/87 ,  H04N19/89 ,  H04N19/895 ,  H04N5/926 ,  H04N5/945 ,  G11B2220/90 ,  H04N19/60 ,  H04N19/65

摘要： In recording and reproducing the digital video signals by bit rate reduction, if they are copied while being subjected to bit rate reduction, no accumulation of distortions in orthogonal transformation or bit rate reduction occurs, and moreover, copying can be done at a low data rate. On the other hand, in case of dividing the data into blocks in each page and transmitting or recording and reproducing the data by block, by concealing the error by the data having the strongest correlation out of the data located in the pages before and after the block in which error has been detected, no degradation in image quality is induced even when the scene changes between pages. Further, at the same time, by detecting the previous concealment information, if there exists a block which was previously concealed in the block in which error has at present been detected, then the data can be fully reproduced by utilizing it, and degradation in image quality can be reduced to a minimum. Also, if degradation in image quality is reduced to a minimum, then the degradation in image quality in the case of repeated copying is reduced to a minimum.

公开(公告)号：US5343501A

公开(公告)日：1994-08-30

申请号：US836660

申请日：1992-02-18

申请人： Shinya Kadono ,  Masakazu Nishino ,  Tatsuro Juri ,  Hiroshi Horikane ,  Iwao Hidaka

发明人： Shinya Kadono ,  Masakazu Nishino ,  Tatsuro Juri ,  Hiroshi Horikane ,  Iwao Hidaka

IPC分类号： G06F17/14 ,  H04L27/06 ,  G06F7/38

CPC分类号： G06F17/147

摘要： In an apparatus for executing an algorithm for realizing an orthogonal transform operation such as the 8 points fast cosine transform, by operating on successive sets of data values of a digital signal such as a digital video signal in such applications as high efficiency coding of a digital video signal, a plurality of multiplication operations that are executed during processing of each set of data values are executed sequentially by time division multiplex operation of a single multiplier (32) which is capable of executing a multiplication operation within one sample period of the digital signal, with input and output data values being transferred by selector units (11, 33, 41) between the multiplier and other sections of the apparatus at appropriate times during processing of each set of the input digital signal values. The scale of hardware required for the apparatus is thereby reduced by comparison with an apparatus which employs a plurality of separate multipliers.

摘要翻译： 在用于执行诸如8点快速余弦变换的正交变换操作的算法的装置中，通过在诸如数字视频信号的数字信号的数据信号的连续集合上进行操作，例如在数字 视频信号，在每个数据值集合的处理期间执行的多个乘法运算通过在数字信号的一个采样周期内能够执行乘法运算的单个乘法器（32）的时分多路复用操作来顺序执行 ，其中输入和输出数据值由选择器单元（11,33,41）在设备的乘法器和其它部分之间的适当时间在每组输入数字信号值的处理期间传送。 与使用多个单独的乘法器的装置相比，装置所需的硬件规模由此减少。

公开(公告)号：US5218563A

公开(公告)日：1993-06-08

申请号：US736056

申请日：1991-07-26

申请人： Tatsuro Juri ,  Shinya Kadono

发明人： Tatsuro Juri ,  Shinya Kadono

IPC分类号： G06F7/38 ,  G06F7/48 ,  H03M7/30 ,  H04N1/41 ,  H04N11/04 ,  H04N19/115 ,  H04N19/132 ,  H04N19/136 ,  H04N19/60 ,  H04N19/85 ,  H04N19/91

CPC分类号： H03M7/30 ,  G06F7/48 ,  G06F7/49952 ,  G06F7/49963

摘要： A data round-off device receives a digital input signal of m-bit form (m is an integer) which has arithmetically been processed by addition, subtraction, multiplication, and division by an orthogonal transformer or predictive encoder is summed, if it is positive, with a value of 2.sup.(n-1) -1 (n is a natural number smaller than m) and if negative, with a value of 2.sup.(n-1) and the higher (m-n) bits of a resultant sum signal are delivered as the output of the data round-off device. Preferably, it is used for control of the number of bits if there is a difference in the number of bits between the data output of an orthogonal transformer and the data input of an encoder for encoding the data output of the orthogonal transformer.

公开(公告)号：US5196930A

公开(公告)日：1993-03-23

申请号：US731311

申请日：1991-07-17

申请人： Shinya Kadono ,  Tatsuro Juri

发明人： Shinya Kadono ,  Tatsuro Juri

IPC分类号： G06F17/14 ,  H04N7/26

CPC分类号： G06F17/147 ,  H04N19/112 ,  H04N19/98 ,  H04N19/30

摘要： In a high efficiency coding apparatus for performing plural different types of orthogonal transformation, by reordering the signals after orthogonal transformation and transforming into signals of same statistic characteristics, distortion of coding efficiency due to mismatching of the characteristics of coding device is reduced even if the output of the orthogonally transformed signal is coded by one fixed coding device.

公开(公告)号：US5117381A

公开(公告)日：1992-05-26

申请号：US739106

申请日：1991-08-01

申请人： Tatsuro Juri ,  Shinya Kadono

发明人： Tatsuro Juri ,  Shinya Kadono

IPC分类号： G06F17/14 ,  H04N7/26 ,  H04N7/30

CPC分类号： G06F17/147 ,  H04N19/126 ,  H04N19/60 ,  H04N19/124

摘要： Eight point Discrete Cosine Transform (DCT) and eight point DCT can be calculated by not more than 8 multiplications by performing a given weighting for each component of orthogonal transformation of DCT and inverse DCT. An orthogonal transformation apparatus can be implemented by one multiplication unit, one addition unit or substraction unit, three butterfly operation units, several resequence units, delay units and selector unit by using one multiplication unit which is capable of one multiplication per one sample on a time-sharing basis.

公开(公告)号：US5140323A

公开(公告)日：1992-08-18

申请号：US741049

申请日：1991-08-06

申请人： Shinya Kadono ,  Tatsuro Juri

发明人： Shinya Kadono ,  Tatsuro Juri

IPC分类号： H04N19/60 ,  G06F17/14 ,  G06T9/00 ,  H03M7/14 ,  H03M7/16 ,  H03M7/30 ,  H04N1/41 ,  H04N11/04 ,  H04N19/44 ,  H04N19/85

CPC分类号： H03M7/16 ,  H03M7/14

摘要： As an orthogonally transformed signal carries a value adjacent to zero, the output of an orthogonal transformer is coupled in series to a fixed length code encoder for converting the orthogonally transformed signal into a fixed length code signal which exhibits less bit inversion between positive and negative signals near zero. The orthogonal transformer and the fixed length code encoder constitute in combination an orthogonal transformer device.

公开(公告)号：US08457485B2

公开(公告)日：2013-06-04

申请号：US13338274

申请日：2011-12-28

申请人： Takashi Masuno ,  Tatsuro Juri ,  Kenjiro Tsuda ,  Hiroaki Shimazaki ,  Yuji Nagaishi

发明人： Takashi Masuno ,  Tatsuro Juri ,  Kenjiro Tsuda ,  Hiroaki Shimazaki ,  Yuji Nagaishi

IPC分类号： G03B35/00 ,  G02B27/22

CPC分类号： G03B35/08 ,  G02B27/144 ,  G03B17/14 ,  G03B17/561 ,  G03B17/565

摘要： Afforded is an optical element holder allowing high-accuracy stereo images to be taken. The holder includes: a rectangular parallelepiped beam splitter (5) having a rectangular incident surface (12); a pair of mutually opposing holding members (8) into which end portions of the beam splitter along the x-axis are fitted; and a base portion (9) and screws (10) that press on the holding members (8), drawing them toward each other. Each of the holding members (8) has a flat surface portion covering a lateral surface of the beam splitter (5), and a peripheral wall portion standing along the periphery of the flat surface potion. A width, along the x-axis, whereby the peripheral wall portion and a first light-exit surface opposing the incident surface (12) of the beam splitter (5) overlap is greater than a width, in the same orientation, whereby the incident surface (12) and the peripheral wall portion overlap.

摘要翻译： 负担得起可以拍摄高精度立体图像的光学元件支架。 保持器包括：具有矩形入射表面（12）的长方体分束器（5）; 一对彼此相对的保持构件（8），分束器的沿x轴的端部被装配到该保持构件中; 以及按压在保持构件（8）上的基部（9）和螺钉（10），将它们彼此拉伸。 每个保持构件（8）具有覆盖分束器（5）的侧表面的平坦表面部分和沿着平坦表面部分的周边竖立的周壁部分。 沿着x轴的宽度，由此周边壁部分和与分束器（5）的入射表面（12）相对的第一光出射表面与相同取向的宽度大于入射面 表面（12）和周壁部分重叠。

公开(公告)号：US08275207B2

公开(公告)日：2012-09-25

申请号：US11996705

申请日：2006-07-19

申请人： Kazuo Okamoto ,  Yuji Nagaishi ,  Tatsuro Juri

发明人： Kazuo Okamoto ,  Yuji Nagaishi ,  Tatsuro Juri

IPC分类号： G06K9/36 ,  G06K9/46 ,  G06K9/00 ,  H04B1/66 ,  H04N7/12 ,  H04N11/02 ,  H04N11/04

CPC分类号： H04N1/41 ,  H04N1/64 ,  H04N19/105 ,  H04N19/126 ,  H04N19/182 ,  H04N19/186 ,  H04N19/50

摘要： An encoding device includes: a difference generation unit for obtaining a first pixel difference value as a difference value between a first pixel value and a pixel value of a pixel having the same color as the first pixel positioned in the vicinity of the first pixel; a quantization width decision unit for deciding a quantization width in data generation by quantizing the first and the second pixel value according to the number of digits of an unsigned integer binary value of the first pixel difference value and the number of digits of an unsigned integer binary value of the second pixel difference value generated in the difference generation unit for the second pixel value of the second pixel; a quantization width information generation unit for generating quantization width information having a quantization width used for quantization/decoding of the first and the second pixel value; and a quantization unit for generating a first and a second compressed encoded pixel value of n-bit length.

摘要翻译： 编码装置包括：差产生单元，用于获得第一像素差值作为第一像素值与具有与位于第一像素附近的第一像素相同颜色的像素的像素值之间的差值; 量化宽度判定单元，用于通过根据第一像素差值的无符号整数二进制值和无符号整数二进制数的位数量化第一和第二像素值来决定数据生成中的量化宽度 在第二像素的第二像素值的差产生单元中生成的第二像素差值的值; 量化宽度信息生成单元，用于生成具有用于第一和第二像素值的量化/解码的量化宽度的量化宽度信息; 以及用于产生n比特长度的第一和第二压缩编码像素值的量化单元。

公开(公告)号：US20120163789A1

公开(公告)日：2012-06-28

申请号：US13338274

申请日：2011-12-28

申请人： Takashi Masuno ,  Tatsuro Juri ,  Kenjiro Tsuda ,  Hiroaki Shimazaki ,  Yuji Nagaishi

发明人： Takashi Masuno ,  Tatsuro Juri ,  Kenjiro Tsuda ,  Hiroaki Shimazaki ,  Yuji Nagaishi

IPC分类号： G03B35/08 ,  G02B27/22

CPC分类号： G03B35/08 ,  G02B27/144 ,  G03B17/14 ,  G03B17/561 ,  G03B17/565

摘要： Afforded is an optical element holder allowing high-accuracy stereo images to be taken. The holder includes: a rectangular parallelepiped beam splitter (5) having a rectangular incident surface (12); a pair of mutually opposing holding members (8) into which end portions of the beam splitter along the x-axis are fitted; and a base portion (9) and screws (10) that press on the holding members (8), drawing them toward each other. Each of the holding members (8) has a flat surface portion covering a lateral surface of the beam splitter (5), and a peripheral wall portion standing along the periphery of the flat surface potion. A width, along the x-axis, whereby the peripheral wall portion and a first light-exit surface opposing the incident surface (12) of the beam splitter (5) overlap is greater than a width, in the same orientation, whereby the incident surface (12) and the peripheral wall portion overlap.

摘要翻译： 负担得起可以拍摄高精度立体图像的光学元件支架。 保持器包括：具有矩形入射表面（12）的长方体分束器（5）; 一对彼此相对的保持构件（8），分束器的沿x轴的端部被装配到该保持构件中; 以及按压在保持构件（8）上的基部（9）和螺钉（10），将它们彼此拉伸。 每个保持构件（8）具有覆盖分束器（5）的侧表面的平坦表面部分和沿着平坦表面部分的周边竖立的周壁部分。 沿着x轴的宽度，由此周边壁部分和与分束器（5）的入射表面（12）相对的第一光出射表面与相同取向的宽度大于入射面 表面（12）和周壁部分重叠。