公开(公告)号：US09382611B2

公开(公告)日：2016-07-05

申请号：US13488626

申请日：2012-06-05

申请人： Shunpei Yamazaki ,  Tetsunori Maruyama ,  Yuki Imoto ,  Hitomi Sato ,  Masahiro Watanabe ,  Mitsuo Mashiyama ,  Kenichi Okazaki ,  Motoki Nakashima ,  Takashi Shimazu

发明人： Shunpei Yamazaki ,  Tetsunori Maruyama ,  Yuki Imoto ,  Hitomi Sato ,  Masahiro Watanabe ,  Mitsuo Mashiyama ,  Kenichi Okazaki ,  Motoki Nakashima ,  Takashi Shimazu

IPC分类号： B28B1/00 ,  C23C14/08 ,  C23C14/34

CPC分类号： C23C14/08 ,  B28B11/243 ,  C04B35/453 ,  C04B35/64 ,  C04B2235/3284 ,  C04B2235/3286 ,  C04B2235/76 ,  C23C14/086 ,  C23C14/3414 ,  C23C14/345 ,  H01L21/02565 ,  H01L21/02631 ,  H01L29/24 ,  H01L29/66969 ,  H01L29/7869

摘要： There have been cases where transistors formed using oxide semiconductors are inferior in reliability to transistors formed using amorphous silicon. Thus, in the present invention, a semiconductor device including a highly reliable transistor formed using an oxide semiconductor is manufactured. An oxide semiconductor film is deposited by a sputtering method, using a sputtering target including an oxide semiconductor having crystallinity, and in which the direction of the c-axis of a crystal is parallel to a normal vector of the top surface of the oxide semiconductor. The target is formed by mixing raw materials so that its composition ratio can obtain a crystal structure.

摘要翻译： 已经有使用氧化物半导体形成的晶体管的可靠性与使用非晶硅形成的晶体管的可靠性差。 因此，在本发明中，制造了包括使用氧化物半导体形成的高可靠性晶体管的半导体器件。 使用包含具有结晶性的氧化物半导体的溅射靶，通过溅射法沉积氧化物半导体膜，并且其中晶体的c轴方向平行于氧化物半导体的顶表面的法向矢量。 通过混合原料形成靶，使其组成比可以得到晶体结构。

公开(公告)号：US08889477B2

公开(公告)日：2014-11-18

申请号：US13603484

申请日：2012-09-05

申请人： Shunpei Yamazaki ,  Tetsunori Maruyama ,  Yuki Imoto ,  Hitomi Sato ,  Masahiro Watanabe ,  Mitsuo Mashiyama ,  Kenichi Okazaki ,  Motoki Nakashima ,  Takashi Shimazu

发明人： Shunpei Yamazaki ,  Tetsunori Maruyama ,  Yuki Imoto ,  Hitomi Sato ,  Masahiro Watanabe ,  Mitsuo Mashiyama ,  Kenichi Okazaki ,  Motoki Nakashima ,  Takashi Shimazu

IPC分类号： H01L21/00 ,  C23C14/08 ,  C23C14/34

CPC分类号： C23C14/08 ,  B28B11/243 ,  C04B35/453 ,  C04B35/64 ,  C04B2235/3284 ,  C04B2235/3286 ,  C04B2235/76 ,  C23C14/086 ,  C23C14/3414 ,  C23C14/345 ,  H01L21/02565 ,  H01L21/02631 ,  H01L29/24 ,  H01L29/66969 ,  H01L29/7869

摘要： A semiconductor device including a highly reliable transistor formed using an oxide semiconductor is manufactured. An oxide semiconductor film is deposited by a sputtering method, using a sputtering target including an oxide semiconductor having crystallinity, and in which the direction of the c-axis of a crystal is parallel to a normal vector of the top surface of the oxide semiconductor. The target is formed by mixing raw materials so that its composition ratio can obtain a crystal structure.

摘要翻译： 制造包括使用氧化物半导体形成的高可靠性晶体管的半导体器件。 使用包含具有结晶性的氧化物半导体的溅射靶，通过溅射法沉积氧化物半导体膜，并且其中晶体的c轴方向平行于氧化物半导体的顶表面的法向矢量。 通过混合原料形成靶，使其组成比可以得到晶体结构。

公开(公告)号：US20120312681A1

公开(公告)日：2012-12-13

申请号：US13488626

申请日：2012-06-05

申请人： Shunpei Yamazaki ,  Tetsunori Maruyama ,  Yuki Imoto ,  Hitomi Sato ,  Masahiro Watanabe ,  Mitsuo Mashiyama ,  Kenichi Okazaki ,  Motoki Nakashima ,  Takashi Shimazu

发明人： Shunpei Yamazaki ,  Tetsunori Maruyama ,  Yuki Imoto ,  Hitomi Sato ,  Masahiro Watanabe ,  Mitsuo Mashiyama ,  Kenichi Okazaki ,  Motoki Nakashima ,  Takashi Shimazu

IPC分类号： C23C14/34 ,  B28B1/00

CPC分类号： C23C14/08 ,  B28B11/243 ,  C04B35/453 ,  C04B35/64 ,  C04B2235/3284 ,  C04B2235/3286 ,  C04B2235/76 ,  C23C14/086 ,  C23C14/3414 ,  C23C14/345 ,  H01L21/02565 ,  H01L21/02631 ,  H01L29/24 ,  H01L29/66969 ,  H01L29/7869

摘要： There have been cases where transistors formed using oxide semiconductors are inferior in reliability to transistors formed using amorphous silicon. Thus, in the present invention, a semiconductor device including a highly reliable transistor formed using an oxide semiconductor is manufactured. An oxide semiconductor film is deposited by a sputtering method, using a sputtering target including an oxide semiconductor having crystallinity, and in which the direction of the c-axis of a crystal is parallel to a normal vector of the top surface of the oxide semiconductor. The target is formed by mixing raw materials so that its composition ratio can obtain a crystal structure.

摘要翻译： 已经有使用氧化物半导体形成的晶体管的可靠性与使用非晶硅形成的晶体管的可靠性差。 因此，在本发明中，制造了包括使用氧化物半导体形成的高可靠性晶体管的半导体器件。 使用包含具有结晶性的氧化物半导体的溅射靶，通过溅射法沉积氧化物半导体膜，并且其中晶体的c轴方向平行于氧化物半导体的顶表面的法向矢量。 通过混合原料形成靶，使其组成比可以得到晶体结构。

公开(公告)号：US20120325650A1

公开(公告)日：2012-12-27

申请号：US13603502

申请日：2012-09-05

申请人： Shunpei Yamazaki ,  Tetsunori Maruyama ,  Yuki Imoto ,  Hitomi Sato ,  Masahiro Watanabe ,  Mitsuo Mashiyama ,  Kenichi Okazaki ,  Motoki Nakashima ,  Takashi Shimazu

发明人： Shunpei Yamazaki ,  Tetsunori Maruyama ,  Yuki Imoto ,  Hitomi Sato ,  Masahiro Watanabe ,  Mitsuo Mashiyama ,  Kenichi Okazaki ,  Motoki Nakashima ,  Takashi Shimazu

IPC分类号： C23C14/08 ,  C23C14/34

CPC分类号： C23C14/08 ,  B28B11/243 ,  C04B35/453 ,  C04B35/64 ,  C04B2235/3284 ,  C04B2235/3286 ,  C04B2235/76 ,  C23C14/086 ,  C23C14/3414 ,  C23C14/345 ,  H01L21/02565 ,  H01L21/02631 ,  H01L29/24 ,  H01L29/66969 ,  H01L29/7869

摘要： There have been cases where transistors formed using oxide semiconductors are inferior in reliability to transistors formed using amorphous silicon. Thus, in the present invention, a semiconductor device including a highly reliable transistor formed using an oxide semiconductor is manufactured. An oxide semiconductor film is deposited by a sputtering method, using a sputtering target including an oxide semiconductor having crystallinity, and in which the direction of the c-axis of a crystal is parallel to a normal vector of the top surface of the oxide semiconductor. The target is formed by mixing raw materials so that its composition ratio can obtain a crystal structure.

公开(公告)号：US09202822B2

公开(公告)日：2015-12-01

申请号：US13316604

申请日：2011-12-12

申请人： Yuta Endo ,  Toshinari Sasaki ,  Kosei Noda ,  Hitomi Sato ,  Yuhei Sato

发明人： Yuta Endo ,  Toshinari Sasaki ,  Kosei Noda ,  Hitomi Sato ,  Yuhei Sato

IPC分类号： H01L27/12 ,  H01L29/49 ,  H01L29/786

CPC分类号： H01L29/4908 ,  H01L21/28088 ,  H01L21/288 ,  H01L27/1225 ,  H01L29/42384 ,  H01L29/66742 ,  H01L29/7869

摘要： To manufacture a transistor whose threshold voltage is controlled without using a backgate electrode, a circuit for controlling the threshold voltage, and an impurity introduction method. To manufacture a semiconductor device having favorable electrical characteristics, high reliability, and low power consumption using the transistor. A gate electrode including a tungsten oxide film whose composition is controlled is used. The composition or the like is adjusted by a film formation method of the tungsten oxide film, whereby the work function can be controlled. By using the tungsten oxide film whose work function is controlled as part of the gate electrode, the threshold of the transistor can be controlled. Using the transistor whose threshold voltage is controlled, a semiconductor device having favorable electrical characteristics, high reliability, and low power consumption can be manufactured.

摘要翻译： 制造在不使用背栅电极的情况下控制阈值电压的晶体管，用于控制阈值电压的电路和杂质导入方法。 使用晶体管制造具有良好的电特性，高可靠性和低功耗的半导体器件。 使用包含其组成被控制的氧化钨膜的栅电极。 通过氧化钨膜的成膜方法调整组合物等，由此可以控制功函数。 通过使用功函数被控制为栅电极的一部分的氧化钨膜，可以控制晶体管的阈值。 通过使用阈值电压被控制的晶体管，可以制造具有良好的电特性，高可靠性和低功耗的半导体器件。

公开(公告)号：US20120153275A1

公开(公告)日：2012-06-21

申请号：US13316604

申请日：2011-12-12

申请人： Yuta Endo ,  Toshinari Sasaki ,  Kosei Noda ,  Hitomi Sato ,  Yuhei Sato

发明人： Yuta Endo ,  Toshinari Sasaki ,  Kosei Noda ,  Hitomi Sato ,  Yuhei Sato

IPC分类号： H01L29/786 ,  H01L21/336

CPC分类号： H01L29/4908 ,  H01L21/28088 ,  H01L21/288 ,  H01L27/1225 ,  H01L29/42384 ,  H01L29/66742 ,  H01L29/7869

摘要： To manufacture a transistor whose threshold voltage is controlled without using a backgate electrode, a circuit for controlling the threshold voltage, and an impurity introduction method. To manufacture a semiconductor device having favorable electrical characteristics, high reliability, and low power consumption using the transistor. A gate electrode including a tungsten oxide film whose composition is controlled is used. The composition or the like is adjusted by a film formation method of the tungsten oxide film, whereby the work function can be controlled. By using the tungsten oxide film whose work function is controlled as part of the gate electrode, the threshold of the transistor can be controlled. Using the transistor whose threshold voltage is controlled, a semiconductor device having favorable electrical characteristics, high reliability, and low power consumption can be manufactured.

摘要翻译： 制造在不使用背栅电极的情况下控制阈值电压的晶体管，用于控制阈值电压的电路和杂质导入方法。 使用晶体管制造具有良好的电特性，高可靠性和低功耗的半导体器件。 使用包含其组成被控制的氧化钨膜的栅电极。 通过氧化钨膜的成膜方法调整组合物等，由此可以控制功函数。 通过使用功函数被控制为栅电极的一部分的氧化钨膜，可以控制晶体管的阈值。 通过使用阈值电压被控制的晶体管，可以制造具有良好的电特性，高可靠性和低功耗的半导体器件。

公开(公告)号：US07519942B2

公开(公告)日：2009-04-14

申请号：US11312612

申请日：2005-12-21

申请人： Masashi Ataka ,  Hitomi Sato

发明人： Masashi Ataka ,  Hitomi Sato

IPC分类号： G06F17/50

CPC分类号： G03F7/70625 ,  G03F1/68

摘要： A pattern specification method for specifying a drawn microscopic pattern, comprising the step of creating a first pattern in which process shift information is reflected on a pattern expressed by design data, the step of enlarging the drawn pattern, the step of performing pattern matching between the first pattern which corresponds to the drawn pattern to-be-specified or a pattern which include patterns surrounding this first pattern and the enlarged pattern or an enlarged pattern which includes enlarged patterns surrounding this enlarged pattern, and the step of outputting the enlarged pattern which matches most in the pattern matching.

摘要翻译： 一种用于指定绘制的微观图案的图案指定方法，包括以下步骤：产生第一图案，其中处理偏移信息反映在由设计数据表示的图案上，放大绘制图案的步骤，执行图案匹配的步骤 对应于要被指定的绘制图案的第一图案或包括围绕该第一图案和放大图案的图案的图案或包括围绕该放大图案的放大图案的放大图案，以及输出匹配的放大图案的步骤 大多数在模式匹配。

公开(公告)号：US08748889B2

公开(公告)日：2014-06-10

申请号：US13188992

申请日：2011-07-22

申请人： Toshinari Sasaki ,  Hitomi Sato ,  Kosei Noda ,  Yuta Endo ,  Mizuho Ikarashi ,  Keitaro Imai ,  Atsuo Isobe ,  Yutaka Okazaki

发明人： Toshinari Sasaki ,  Hitomi Sato ,  Kosei Noda ,  Yuta Endo ,  Mizuho Ikarashi ,  Keitaro Imai ,  Atsuo Isobe ,  Yutaka Okazaki

IPC分类号： H01L29/12 ,  H01L21/36

CPC分类号： H01L29/7869 ,  H01L29/66969 ,  H01L29/78603 ,  H01L29/78606

摘要： It is an object to manufacture a semiconductor device in which a transistor including an oxide semiconductor has normally-off characteristics, small fluctuation in electric characteristics, and high reliability. First, first heat treatment is performed on a substrate, a base insulating layer is formed over the substrate, an oxide semiconductor layer is formed over the base insulating layer, and the step of performing the first heat treatment to the step of forming the oxide semiconductor layer are performed without exposure to the air. Next, after the oxide semiconductor layer is formed, second heat treatment is performed. An insulating layer from which oxygen is released by heating is used as the base insulating layer.

摘要翻译： 本发明的目的是制造其中包括氧化物半导体的晶体管具有常态特性，电特性波动小，可靠性高的半导体器件。 首先，在基板上进行第一热处理，在基板上形成基极绝缘层，在基底绝缘层上形成氧化物半导体层，对形成氧化物半导体的工序进行第一热处理的工序 在不暴露于空气的情况下执行层。 接下来，在形成氧化物半导体层之后，进行第二热处理。 使用通过加热而释放氧的绝缘层作为基底绝缘层。

公开(公告)号：US08841664B2

公开(公告)日：2014-09-23

申请号：US13404516

申请日：2012-02-24

申请人： Hitomi Sato ,  Takayuki Saito ,  Kosei Noda ,  Toru Takayama

发明人： Hitomi Sato ,  Takayuki Saito ,  Kosei Noda ,  Toru Takayama

IPC分类号： H01L29/10 ,  H01L29/786 ,  H01L27/108 ,  H01L29/49 ,  H01L27/115

CPC分类号： H01L29/7869 ,  H01L27/10873 ,  H01L27/1156 ,  H01L29/4908 ,  H01L29/78603 ,  H01L29/78606

摘要： Provided is a highly reliable semiconductor device by giving stable electric characteristics to a transistor in which a semiconductor film whose threshold voltage is difficult to control is used as an active layer. By using a silicon oxide film having a negative fixed charge as a film in contact with the active layer of the transistor or a film in the vicinity of the active layer, a negative electric field is always applied to the active layer due to the negative fixed charge and the threshold voltage of the transistor can be shifted in the positive direction. Thus, the highly reliable semiconductor device can be manufactured by giving stable electric characteristics to the transistor.

摘要翻译： 提供了一种高可靠性的半导体器件，其通过对其中阈值电压难以控制的半导体膜用作有源层的晶体管给予稳定的电特性。 通过使用具有负固定电荷的氧化硅膜作为与晶体管的有源层或有源层附近的膜接触的膜，由于负固定，总是向有源层施加负电场 电荷和晶体管的阈值电压可以向正方向移动。 因此，可以通过给晶体管提供稳定的电特性来制造高度可靠的半导体器件。

公开(公告)号：US20060169896A1

公开(公告)日：2006-08-03

申请号：US11312612

申请日：2005-12-21

申请人： Masashi Ataka ,  Hitomi Sato

发明人： Masashi Ataka ,  Hitomi Sato

IPC分类号： G21K7/00

CPC分类号： G03F7/70625 ,  G03F1/68

摘要： A pattern specification method for specifying a drawn microscopic pattern, comprising the step of creating a first pattern in which process shift information is reflected on a pattern expressed by design data, the step of enlarging the drawn pattern, the step of performing pattern matching between the first pattern which corresponds to the drawn pattern to-be-specified or a pattern which include patterns surrounding this first pattern and the enlarged pattern or an enlarged pattern which includes enlarged patterns surrounding this enlarged pattern, and the step of outputting the enlarged pattern which matches most in the pattern matching.