公开(公告)号：US07923349B2

公开(公告)日：2011-04-12

申请号：US12142589

申请日：2008-06-19

申请人： Simon J. S. McElrea ,  Terrence Caskey ,  Scott McGrath ,  DeAnn Eileen Melcher ,  Reynaldo Co ,  Lawrence Douglas Andrews, Jr. ,  Weiping Pan ,  Grant Villavicencio ,  Yong Du ,  Scott Jay Crane ,  Zongrong Liu

发明人： Simon J. S. McElrea ,  Terrence Caskey ,  Scott McGrath ,  DeAnn Eileen Melcher ,  Reynaldo Co ,  Lawrence Douglas Andrews, Jr. ,  Weiping Pan ,  Grant Villavicencio ,  Yong Du ,  Scott Jay Crane ,  Zongrong Liu

IPC分类号： H01L21/46 ,  H01L21/78 ,  H01L21/301

CPC分类号： H01L21/6835 ,  H01L21/6836 ,  H01L21/78 ,  H01L23/3185 ,  H01L24/81 ,  H01L24/83 ,  H01L2221/68327 ,  H01L2221/6834 ,  H01L2221/68359 ,  H01L2221/68377 ,  H01L2224/2919 ,  H01L2224/81801 ,  H01L2224/83851 ,  H01L2924/14 ,  H01L2924/1461 ,  H01L2924/0665 ,  H01L2924/00014 ,  H01L2924/00

摘要： An electrically insulative conformal coating is applied at least to the active (front) side and one or more sidewalls of the die during wafer processing. Also, a die has an electrically insulative conformal coating applied to at least the active (front) side and sidewalls. Also, assemblies include a stack of such die, electrically interconnected die-to-die; and assemblies include such a die or a stack of such die, electrically interconnected to underlying circuitry (for example in a substrate or a circuit board).

摘要翻译： 至少在晶片加工过程中至少施加电绝缘保形涂层至模具的活性（前）侧和一个或多个侧壁。 此外，模具具有至少施加到活性（前）侧和侧壁的电绝缘保形涂层。 此外，组件包括这种模具的叠层，电互连的模 - 芯; 并且组件包括这种管芯或这种管芯的堆叠，电连接到下面的电路（例如在基板或电路板中）。

公开(公告)号：US20110147943A1

公开(公告)日：2011-06-23

申请号：US13041192

申请日：2011-03-04

申请人： Simon J. S. McElrea ,  Terrence Caskey ,  Scott McGrath ,  DeAnn Eileen Melcher ,  Reynaldo Co ,  Lawrence Douglas Andrews, JR. ,  Weiping Pan ,  Grant Villavicencio ,  Yong Du ,  Scott Jay Crane ,  Zongrong Liu

发明人： Simon J. S. McElrea ,  Terrence Caskey ,  Scott McGrath ,  DeAnn Eileen Melcher ,  Reynaldo Co ,  Lawrence Douglas Andrews, JR. ,  Weiping Pan ,  Grant Villavicencio ,  Yong Du ,  Scott Jay Crane ,  Zongrong Liu

IPC分类号： H01L23/48 ,  H01L21/78

CPC分类号： H01L21/6835 ,  H01L21/6836 ,  H01L21/78 ,  H01L23/3185 ,  H01L24/81 ,  H01L24/83 ,  H01L2221/68327 ,  H01L2221/6834 ,  H01L2221/68359 ,  H01L2221/68377 ,  H01L2224/2919 ,  H01L2224/81801 ,  H01L2224/83851 ,  H01L2924/14 ,  H01L2924/1461 ,  H01L2924/0665 ,  H01L2924/00014 ,  H01L2924/00

摘要： An electrically insulative conformal coating is applied at least to the active (front) side and one or more sidewalls of the die during wafer processing. Also, a die has an electrically insulative conformal coating applied to at least the active (front) side and sidewalls. Also, assemblies include a stack of such die, electrically interconnected die-to-die; and assemblies include such a die or a stack of such die, electrically interconnected to underlying circuitry (for example in a substrate or a circuit board).

摘要翻译： 至少在晶片加工过程中至少施加电绝缘保形涂层至模具的活性（前）侧和一个或多个侧壁。 此外，模具具有至少施加到活性（前）侧和侧壁的电绝缘保形涂层。 此外，组件包括这种模具的叠层，电互连的模 - 芯; 并且组件包括这种管芯或这种管芯的堆叠，电连接到下面的电路（例如在基板或电路板中）。

公开(公告)号：US08324081B2

公开(公告)日：2012-12-04

申请号：US13041192

申请日：2011-03-04

申请人： Simon J. S. McElrea ,  Terrence Caskey ,  Scott McGrath ,  DeAnn Eileen Melcher ,  Reynaldo Co ,  Lawrence Douglas Andrews, Jr. ,  Weiping Pan ,  Grant Villavicencio ,  Yong Du ,  Scott Jay Crane ,  Zongrong Liu

发明人： Simon J. S. McElrea ,  Terrence Caskey ,  Scott McGrath ,  DeAnn Eileen Melcher ,  Reynaldo Co ,  Lawrence Douglas Andrews, Jr. ,  Weiping Pan ,  Grant Villavicencio ,  Yong Du ,  Scott Jay Crane ,  Zongrong Liu

IPC分类号： H01L21/46 ,  H01L21/78 ,  H01L21/301

CPC分类号： H01L21/6835 ,  H01L21/6836 ,  H01L21/78 ,  H01L23/3185 ,  H01L24/81 ,  H01L24/83 ,  H01L2221/68327 ,  H01L2221/6834 ,  H01L2221/68359 ,  H01L2221/68377 ,  H01L2224/2919 ,  H01L2224/81801 ,  H01L2224/83851 ,  H01L2924/14 ,  H01L2924/1461 ,  H01L2924/0665 ,  H01L2924/00014 ,  H01L2924/00

摘要： An electrically insulative conformal coating is applied at least to the active (front) side and one or more sidewalls of the die during wafer processing. Also, a die has an electrically insulative conformal coating applied to at least the active (front) side and sidewalls. Also, assemblies include a stack of such die, electrically interconnected die-to-die; and assemblies include such a die or a stack of such die, electrically interconnected to underlying circuitry (for example in a substrate or a circuit board).

摘要翻译： 至少在晶片加工过程中至少施加电绝缘保形涂层至模具的活性（前）侧和一个或多个侧壁。 此外，模具具有至少施加到活性（前）侧和侧壁的电绝缘保形涂层。 此外，组件包括这种模具的叠层，电互连的模 - 芯; 并且组件包括这种管芯或这种管芯的堆叠，电连接到下面的电路（例如在基板或电路板中）。

公开(公告)号：US20080315434A1

公开(公告)日：2008-12-25

申请号：US12142589

申请日：2008-06-19

申请人： Simon J.S. McElrea ,  Terrence Caskey ,  Scott McGrath ,  DeAnn Eileen Melcher ,  Reynaldo Co ,  Lawrence Douglas Andrews, JR. ,  Weiping Pan ,  Grant Villavicencio ,  Yong Du ,  Scott Jay Crane ,  Zongrong Liu

发明人： Simon J.S. McElrea ,  Terrence Caskey ,  Scott McGrath ,  DeAnn Eileen Melcher ,  Reynaldo Co ,  Lawrence Douglas Andrews, JR. ,  Weiping Pan ,  Grant Villavicencio ,  Yong Du ,  Scott Jay Crane ,  Zongrong Liu

IPC分类号： H01L21/304 ,  H01L23/488

CPC分类号： H01L21/6835 ,  H01L21/6836 ,  H01L21/78 ,  H01L23/3185 ,  H01L24/81 ,  H01L24/83 ,  H01L2221/68327 ,  H01L2221/6834 ,  H01L2221/68359 ,  H01L2221/68377 ,  H01L2224/2919 ,  H01L2224/81801 ,  H01L2224/83851 ,  H01L2924/14 ,  H01L2924/1461 ,  H01L2924/0665 ,  H01L2924/00014 ,  H01L2924/00

摘要： An electrically insulative conformal coating is applied at least to the active (front) side and one or more sidewalls of the die during wafer processing. Also, a die has an electrically insulative conformal coating applied to at least the active (front) side and sidewalls. Also, assemblies include a stack of such die, electrically interconnected die-to-die; and assemblies include such a die or a stack of such die, electrically interconnected to underlying circuitry (for example in a substrate or a circuit board).

摘要翻译： 至少在晶片加工过程中至少施加电绝缘保形涂层至模具的活性（前）侧和一个或多个侧壁。 此外，模具具有至少施加到活性（前）侧和侧壁的电绝缘保形涂层。 此外，组件包括这种模具的叠层，电互连的模 - 芯; 并且组件包括这种管芯或这种管芯的堆叠，电连接到下面的电路（例如在基板或电路板中）。

公开(公告)号：US08704379B2

公开(公告)日：2014-04-22

申请号：US12199080

申请日：2008-08-27

申请人： Scott Jay Crane ,  Simon J. S. McElrea ,  Scott McGrath ,  Weiping Pan ,  DeAnn Eileen Melcher ,  Marc E. Robinson

发明人： Scott Jay Crane ,  Simon J. S. McElrea ,  Scott McGrath ,  Weiping Pan ,  DeAnn Eileen Melcher ,  Marc E. Robinson

IPC分类号： H01L23/48

CPC分类号： H01L24/83 ,  H01L23/293 ,  H01L23/3171 ,  H01L23/3185 ,  H01L24/24 ,  H01L24/27 ,  H01L24/29 ,  H01L24/32 ,  H01L24/73 ,  H01L25/0657 ,  H01L2224/24145 ,  H01L2224/24146 ,  H01L2224/27452 ,  H01L2224/29005 ,  H01L2224/29006 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/32245 ,  H01L2224/48227 ,  H01L2224/48247 ,  H01L2224/48465 ,  H01L2224/73265 ,  H01L2224/83191 ,  H01L2224/8385 ,  H01L2224/92247 ,  H01L2225/0651 ,  H01L2225/06524 ,  H01L2225/06551 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01033 ,  H01L2924/01038 ,  H01L2924/01082 ,  H01L2924/12042 ,  H01L2924/14 ,  H01L2924/00 ,  H01L2924/00012

摘要： A conformal coating on a semiconductor die provides adhesion between the die and a support. No additional adhesive is necessary to affix the die on the support. The conformal coating protects the die during assembly, and serves to electrically insulate the die from electrically conductive parts that the die may contact. The conformal coating may be an organic polymer, such as a parylene, for example. Also, a method for adhering a die onto a support, which may optionally be another die, includes providing a conformal coating between the die and the support, and heating the coating between the die and the support. The conformal coating may be provided on either or both a die attach area of a surface of the die, or a die mount region of a surface of the support; and the conformal coating may be provided following placement of the die on the support.

摘要翻译： 半导体管芯上的保形涂层提供了管芯和支撑件之间的粘附。 不需要额外的粘合剂将模具固定在支撑件上。 共形涂层在组装期间保护模具，并且用于使模具与模具可接触的导电部件电绝缘。 保形涂层可以是有机聚合物，例如聚对二甲苯。 此外，将模具粘附到可任选地是另一个模具的支撑件上的方法包括在模具和支撑件之间提供共形涂层，以及加热模具和支撑件之间的涂层。 保形涂层可以设置在模具表面的芯片附接区域或支撑体表面的模具安装区域中的任一个或两者上; 并且可以在将模具放置在支撑件上之后提供保形涂层。

公开(公告)号：US08884403B2

公开(公告)日：2014-11-11

申请号：US12982376

申请日：2010-12-30

申请人： Reynaldo Co ,  DeAnn Eileen Melcher ,  Weiping Pan ,  Grant Villavicencio

发明人： Reynaldo Co ,  DeAnn Eileen Melcher ,  Weiping Pan ,  Grant Villavicencio

IPC分类号： H01L23/544 ,  H01L21/78 ,  H01L21/683 ,  H01L23/00

CPC分类号： H01L21/78 ,  H01L21/6835 ,  H01L21/6836 ,  H01L24/27 ,  H01L24/83 ,  H01L2221/68327 ,  H01L2221/6834 ,  H01L2221/68359 ,  H01L2224/274 ,  H01L2224/83191 ,  H01L2924/14 ,  H01L2924/1461 ,  H01L2924/00

摘要： According to the invention, die shift is reduced or substantially eliminated, by cutting the wafer in two stages. In some embodiments a first wafer cutting procedure is carried out prior to thinning the wafer to the prescribed die thickness; and in other embodiments the wafer is thinned to the prescribed die thickness prior to carrying out a first wafer cutting procedure. The first wafer cutting procedure includes cutting along a first set of streets to a depth greater than the prescribed die thickness and optionally along a second set of streets to a depth less than the die thickness. The result of the first cutting procedure is an array of strips or blocks of die, each including a plurality of connected die, that are less subject to shift than are individual singulated die. In a second wafer cutting procedure the die are singulated by cutting through along the second set of streets. Subsequent to the first cutting procedure, and prior to the second cutting procedure, additional die preparation procedures that are sensitive to die shift may be carried out.

摘要翻译： 根据本发明，通过两个阶段切割晶片来减小或基本消除晶片位移。 在一些实施例中，在将晶片减薄到规定的模具厚度之前执行第一晶片切割程序; 并且在其他实施例中，在执行第一晶片切割程序之前将晶片减薄到规定的模具厚度。 第一晶片切割程序包括沿着第一组街道切割到大于规定模具厚度的深度，并且可选地沿着第二组街道切割至小于模具厚度的深度。 第一切割过程的结果是一组带状或模具块，每个包括多个连接的模具，其比单独的单个模具更少受到偏移。 在第二晶片切割过程中，通过沿着第二组街道切割来切割模具。 在第一切割过程之后，并且在第二切割过程之前，可以进行对模移的敏感的附加的模具制备程序。

公开(公告)号：US20090315174A1

公开(公告)日：2009-12-24

申请号：US12323288

申请日：2008-11-25

申请人： Reynaldo Co ,  DeAnn Eileen Melcher ,  Weiping Pan ,  Grant Villavicencio

发明人： Reynaldo Co ,  DeAnn Eileen Melcher ,  Weiping Pan ,  Grant Villavicencio

IPC分类号： H01L23/48 ,  H01L21/00

CPC分类号： H01L21/78 ,  H01L21/6835 ,  H01L21/6836 ,  H01L24/27 ,  H01L24/83 ,  H01L2221/68327 ,  H01L2221/6834 ,  H01L2221/68359 ,  H01L2224/274 ,  H01L2224/83191 ,  H01L2924/14 ,  H01L2924/1461 ,  H01L2924/00

摘要： According to the invention, die shift is reduced or substantially eliminated, by cutting the wafer in two stages. In some embodiments a first wafer cutting procedure is carried out prior to thinning the wafer to the prescribed die thickness; and in other embodiments the wafer is thinned to the prescribed die thickness prior to carrying out a first wafer cutting procedure. The first wafer cutting procedure includes cutting along a first set of streets to a depth greater than the prescribed die thickness and optionally along a second set of streets to a depth less than the die thickness. The result of the first cutting procedure is an array of strips or blocks of die, each including a plurality of connected die, that are less subject to shift than are individual singulated die. In a second wafer cutting procedure the die are singulated by cutting through along the second set of streets. Subsequent to the first cutting procedure, and prior to the second cutting procedure, additional die preparation procedures that are sensitive to die shift may be carried out.

摘要翻译： 根据本发明，通过两个阶段切割晶片来减小或基本消除晶片位移。 在一些实施例中，在将晶片减薄到规定的模具厚度之前执行第一晶片切割程序; 并且在其他实施例中，在执行第一晶片切割程序之前将晶片减薄到规定的模具厚度。 第一晶片切割程序包括沿着第一组街道切割到大于规定模具厚度的深度，并且可选地沿着第二组街道切割至小于模具厚度的深度。 第一切割过程的结果是一个或多个模具的阵列，每个芯片或多个模具包括多个连接的模具，其比单独的单个模具更少受到偏移。 在第二晶片切割过程中，通过沿着第二组街道切割来切割模具。 在第一切割过程之后，并且在第二切割过程之前，可以进行对模移的敏感的附加的模具制备程序。

公开(公告)号：US20110101505A1

公开(公告)日：2011-05-05

申请号：US12982376

申请日：2010-12-30

申请人： Reynaldo Co ,  DeAnn Eileen Melcher ,  Weiping Pan ,  Grant Villavicencio

发明人： Reynaldo Co ,  DeAnn Eileen Melcher ,  Weiping Pan ,  Grant Villavicencio

IPC分类号： H01L23/544 ,  H01L23/52

CPC分类号： H01L21/78 ,  H01L21/6835 ,  H01L21/6836 ,  H01L24/27 ,  H01L24/83 ,  H01L2221/68327 ,  H01L2221/6834 ,  H01L2221/68359 ,  H01L2224/274 ,  H01L2224/83191 ,  H01L2924/14 ,  H01L2924/1461 ,  H01L2924/00

摘要： According to the invention, die shift is reduced or substantially eliminated, by cutting the wafer in two stages. In some embodiments a first wafer cutting procedure is carried out prior to thinning the wafer to the prescribed die thickness; and in other embodiments the wafer is thinned to the prescribed die thickness prior to carrying out a first wafer cutting procedure. The first wafer cutting procedure includes cutting along a first set of streets to a depth greater than the prescribed die thickness and optionally along a second set of streets to a depth less than the die thickness. The result of the first cutting procedure is an array of strips or blocks of die, each including a plurality of connected die, that are less subject to shift than are individual singulated die. In a second wafer cutting procedure the die are singulated by cutting through along the second set of streets. Subsequent to the first cutting procedure, and prior to the second cutting procedure, additional die preparation procedures that are sensitive to die shift may be carried out.

摘要翻译： 根据本发明，通过两个阶段切割晶片来减小或基本消除晶片位移。 在一些实施例中，在将晶片减薄到规定的模具厚度之前执行第一晶片切割程序; 并且在其他实施例中，在执行第一晶片切割程序之前将晶片减薄到规定的模具厚度。 第一晶片切割程序包括沿着第一组街道切割到大于规定模具厚度的深度，并且可选地沿着第二组街道切割至小于模具厚度的深度。 第一切割过程的结果是一个或多个模具的阵列，每个芯片或多个模具包括多个连接的模具，其比单独的单个模具更少受到偏移。 在第二晶片切割过程中，通过沿着第二组街道切割来切割模具。 在第一切割过程之后，并且在第二切割过程之前，可以进行对模移的敏感的附加的模具制备程序。

公开(公告)号：US07863159B2

公开(公告)日：2011-01-04

申请号：US12323288

申请日：2008-11-25

申请人： Reynaldo Co ,  DeAnn Eileen Melcher ,  Weiping Pan ,  Grant Villavicencio

发明人： Reynaldo Co ,  DeAnn Eileen Melcher ,  Weiping Pan ,  Grant Villavicencio

IPC分类号： H01L21/00

CPC分类号： H01L21/78 ,  H01L21/6835 ,  H01L21/6836 ,  H01L24/27 ,  H01L24/83 ,  H01L2221/68327 ,  H01L2221/6834 ,  H01L2221/68359 ,  H01L2224/274 ,  H01L2224/83191 ,  H01L2924/14 ,  H01L2924/1461 ,  H01L2924/00

摘要： According to the invention, die shift is reduced or substantially eliminated, by cutting the wafer in two stages. In some embodiments a first wafer cutting procedure is carried out prior to thinning the wafer to the prescribed die thickness; and in other embodiments the wafer is thinned to the prescribed die thickness prior to carrying out a first wafer cutting procedure. The first wafer cutting procedure includes cutting along a first set of streets to a depth greater than the prescribed die thickness and optionally along a second set of streets to a depth less than the die thickness. The result of the first cutting procedure is an array of strips or blocks of die, each including a plurality of connected die, that are less subject to shift than are individual singulated die. In a second wafer cutting procedure the die are singulated by cutting through along the second set of streets. Subsequent to the first cutting procedure, and prior to the second cutting procedure, additional die preparation procedures that are sensitive to die shift may be carried out.

摘要翻译： 根据本发明，通过两个阶段切割晶片来减小或基本消除晶片位移。 在一些实施例中，在将晶片减薄到规定的模具厚度之前执行第一晶片切割程序; 并且在其他实施例中，在执行第一晶片切割程序之前将晶片减薄到规定的模具厚度。 第一晶片切割程序包括沿着第一组街道切割到大于规定模具厚度的深度，并且可选地沿着第二组街道切割至小于模具厚度的深度。 第一切割过程的结果是一组带状或模具块，每个包括多个连接的模具，其比单独的单个模具更少受到偏移。 在第二晶片切割过程中，通过沿着第二组街道切割来切割模具。 在第一切割过程之后，并且在第二切割过程之前，可以进行对模移的敏感的附加的模具制备程序。

公开(公告)号：US20090065916A1

公开(公告)日：2009-03-12

申请号：US12199080

申请日：2008-08-27

申请人： Scott Jay Crane ,  Simon J.S. McElrea ,  Scott McGrath ,  Weiping Pan ,  De Ann Melcher ,  Marc E. Robinson

发明人： Scott Jay Crane ,  Simon J.S. McElrea ,  Scott McGrath ,  Weiping Pan ,  De Ann Melcher ,  Marc E. Robinson

IPC分类号： H01L23/52 ,  H01L21/00

CPC分类号： H01L24/83 ,  H01L23/293 ,  H01L23/3171 ,  H01L23/3185 ,  H01L24/24 ,  H01L24/27 ,  H01L24/29 ,  H01L24/32 ,  H01L24/73 ,  H01L25/0657 ,  H01L2224/24145 ,  H01L2224/24146 ,  H01L2224/27452 ,  H01L2224/29005 ,  H01L2224/29006 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/32245 ,  H01L2224/48227 ,  H01L2224/48247 ,  H01L2224/48465 ,  H01L2224/73265 ,  H01L2224/83191 ,  H01L2224/8385 ,  H01L2224/92247 ,  H01L2225/0651 ,  H01L2225/06524 ,  H01L2225/06551 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01033 ,  H01L2924/01038 ,  H01L2924/01082 ,  H01L2924/12042 ,  H01L2924/14 ,  H01L2924/00 ,  H01L2924/00012

摘要： A conformal coating on a semiconductor die provides adhesion between the die and a support. No additional adhesive is necessary to affix the die on the support. The conformal coating protects the die during assembly, and serves to electrically insulate the die from electrically conductive parts that the die may contact. The conformal coating may be an organic polymer, such as a parylene, for example. Also, a method for adhering a die onto a support, which may optionally be another die, includes providing a coating of a conformal between the die and the support, and heating the coating between the die and the support. The conformal coating may be provided on a die attach area of a surface of the die, or on a die mount region of a surface of the support, or on both a die attach area of a surface of the die and on a die mount region of a surface of the support; and the conformal coating may be provided following placement of the die on the support.

摘要翻译： 半导体管芯上的保形涂层提供了管芯和支撑件之间的粘附。 不需要额外的粘合剂将模具固定在支撑件上。 共形涂层在组装期间保护模具，并且用于使模具与模具可接触的导电部件电绝缘。 保形涂层可以是有机聚合物，例如聚对二甲苯。 此外，将模具粘附到可任选地是另一个模具的支撑件上的方法包括在模具和支撑件之间提供共形的涂层，以及加热模具和支撑件之间的涂层。 保形涂层可以设置在模具的表面的芯片附着区域上，或在支撑体的表面的模具安装区域上，或者在模具的表面的芯片附着区域上以及模具安装区域 的支撑体的表面; 并且可以在将模具放置在支撑件上之后提供保形涂层。