公开(公告)号：US20090201395A1

公开(公告)日：2009-08-13

申请号：US12205746

申请日：2008-09-05

Applicant: Sohei Manabe ,  Satyadev Nagaraia

Inventor： Sohei Manabe ,  Satyadev Nagaraia

IPC: H01L31/0216 ,  H04N5/335

CPC classification number: H04N5/335 ,  H01L27/1462 ,  H01L27/1463 ,  H01L27/1464 ,  H01L27/14643 ,  H04N5/3572 ,  H04N5/369

Abstract: A backside illuminated imaging sensor includes a semiconductor having an imaging pixel that includes a photodiode region, an insulator, and a silicide reflective layer. The photodiode region is formed in the frontside of the semiconductor substrate. The insulation layer is formed on the backside of the semiconductor substrate. The transparent electrode formed on the backside of the insulation layer. The transparent electrode allows light to be transmitted through a back surface of the semiconductor substrate such that when the transparent electrode is biased, carriers are formed in a region in the backside of the semiconductor substrate to reduce leakage current. ARC layers can be used to increase sensitivity of the sensor to selected wavelengths of light.

Abstract translation: 背面照明成像传感器包括具有包括光电二极管区域，绝缘体和硅化物反射层的成像像素的半导体。 光电二极管区域形成在半导体衬底的前侧。 绝缘层形成在半导体衬底的背面。 形成在绝缘层背面的透明电极。 透明电极允许光透射通过半导体衬底的背面，使得当透明电极被偏压时，在半导体衬底的背面的区域中形成载流子以减少漏电流。 ARC层可用于增加传感器对所选波长光的敏感度。

公开(公告)号：US08212901B2

公开(公告)日：2012-07-03

申请号：US12205746

申请日：2008-09-05

Applicant: Sohei Manabe ,  Satyadev Nagaraia

Inventor： Sohei Manabe ,  Satyadev Nagaraia

IPC: H04N3/14

CPC classification number: H04N5/335 ,  H01L27/1462 ,  H01L27/1463 ,  H01L27/1464 ,  H01L27/14643 ,  H04N5/3572 ,  H04N5/369

Abstract: A backside illuminated imaging sensor includes a semiconductor having an imaging pixel that includes a photodiode region, an insulator, and a silicide reflective layer. The photodiode region is formed in the frontside of the semiconductor substrate. The insulation layer is formed on the backside of the semiconductor substrate. The transparent electrode formed on the backside of the insulation layer. The transparent electrode allows light to be transmitted through a back surface of the semiconductor substrate such that when the transparent electrode is biased, carriers are formed in a region in the backside of the semiconductor substrate to reduce leakage current. ARC layers can be used to increase sensitivity of the sensor to selected wavelengths of light.

Abstract translation: 背面照明成像传感器包括具有包括光电二极管区域，绝缘体和硅化物反射层的成像像素的半导体。 光电二极管区域形成在半导体衬底的前侧。 绝缘层形成在半导体衬底的背面。 形成在绝缘层背面的透明电极。 透明电极允许光透射通过半导体衬底的背面，使得当透明电极被偏压时，在半导体衬底的背面的区域中形成载流子以减少漏电流。 ARC层可用于增加传感器对所选波长光的敏感度。

公开(公告)号：US09007504B2

公开(公告)日：2015-04-14

申请号：US13441697

申请日：2012-04-06

Applicant: Sohei Manabe ,  Jeong-Ho Lyu

Inventor： Sohei Manabe ,  Jeong-Ho Lyu

IPC: H04N5/335 ,  H01L27/146

CPC classification number: H01L27/14609 ,  H01L27/14632 ,  H01L27/14636 ,  H01L27/1464

Abstract: Circuitry to reduce signal noise characteristics in an image sensor. In an embodiment, a bit trace line segment is located between neighboring respective segments of a source follower power trace and an additional trace which is to remain at a first voltage level during a pixel cell readout time period. In another embodiment, for each such trace segment, a smallest separation between the trace segment and the respective neighboring other one of such trace segments is substantially equal to or less than some maximum length to provide for parasitic capacitance between the bit line trace and one or more other traces.

Abstract translation: 降低图像传感器信号噪声特性的电路。 在一个实施例中，位跟踪线段位于源极跟随器功率迹线的相邻相应段和在像素单元读出时间段期间保持在第一电压电平的附加迹线。 在另一个实施例中，对于每个这样的迹线段，迹线段和这些迹线段中相应的相邻另一个之间的最小间隔基本上等于或小于一些最大长度，以提供位线迹线与位线迹线之间的寄生电容， 更多的其他痕迹。

公开(公告)号：US08804021B2

公开(公告)日：2014-08-12

申请号：US13288880

申请日：2011-11-03

Applicant: Sohei Manabe ,  Keh-Chiang Ku ,  Vincent Venezia ,  Hsin-Chih Tai ,  Duli Mao ,  Howard E. Rhodes

Inventor： Sohei Manabe ,  Keh-Chiang Ku ,  Vincent Venezia ,  Hsin-Chih Tai ,  Duli Mao ,  Howard E. Rhodes

IPC: H04N3/14 ,  H04N5/335

CPC classification number: H01L27/14643 ,  H01L27/1461 ,  H01L27/14612 ,  H01L27/14616 ,  H01L27/1463 ,  H01L27/14641

Abstract: Techniques and mechanisms for improving full well capacity for pixel structures in an image sensor. In an embodiment, a first pixel structure of the image sensor includes an implant region, where a skew of the implant region corresponds to an implant angle, and a second pixel structure of the image sensor includes a transfer gate. In another embodiment, an offset of the implant region of the first pixel structure from the transfer gate of the second pixel structure corresponds to the implant angle.

Abstract translation: 用于提高图像传感器中像素结构的完整容量的技术和机制。 在一个实施例中，图像传感器的第一像素结构包括植入区域，其中植入区域的偏斜对应于植入角度，并且图像传感器的第二像素结构包括传输门。 在另一个实施例中，第一像素结构的注入区域与第二像素结构的传输门的偏移对应于植入角度。

公开(公告)号：US20140063304A1

公开(公告)日：2014-03-06

申请号：US13599343

申请日：2012-08-30

Applicant: Sohei Manabe ,  Jeong-Ho Lyu

Inventor： Sohei Manabe ,  Jeong-Ho Lyu

IPC: H04N5/335 ,  H01L27/146

CPC classification number: H01L27/14612 ,  H01L27/14641 ,  H04N5/353 ,  H04N5/3532 ,  H04N5/3745 ,  H04N5/37452

Abstract: An image sensor pixel includes a photosensitive region and pixel circuitry. The photosensitive region accumulates an image charge in response to light incident upon the image sensor. The pixel circuitry includes a transfer-storage transistor, a charge-storage area, an output transistor, and a floating diffusion region. The transfer-storage transistor is coupled between the photosensitive region and the charge-storage area. The output transistor has a channel coupled between the charge-storage area and the floating diffusion region and has a gate tied to a fixed voltage potential. The transfer-storage transistor causes the image charge to transfer from the photosensitive region to the charge-storage area and to transfer from the charge-storage area to the floating diffusion region.

Abstract translation: 图像传感器像素包括光敏区域和像素电路。 感光区域响应入射到图像传感器上的光积累图像电荷。 像素电路包括转移存储晶体管，电荷存储区域，输出晶体管和浮动扩散区域。 转移存储晶体管耦合在感光区域和电荷存储区域之间。 输出晶体管具有耦合在电荷存储区域和浮动扩散区域之间并且具有连接到固定电压电位的栅极的沟道。 转移储存晶体管使得图像电荷从光敏区域转移到电荷存储区域并从电荷存储区域转移到浮动扩散区域。

公开(公告)号：US08461660B2

公开(公告)日：2013-06-11

申请号：US13251036

申请日：2011-09-30

Applicant: Sohei Manabe

Inventor： Sohei Manabe

IPC: H01L27/146

CPC classification number: H01L27/14603 ,  H01L27/14609 ,  H01L27/14641 ,  H01L27/14645

Abstract: Techniques and mechanisms to improve potential well characteristics in a pixel cell. In an embodiment, a coupling portion of a pixel cell couples a reset transistor of the pixel cell to a floating diffusion node of the pixel cell, the reset transistor to reset a voltage of the floating diffusion node. In another embodiment, the pixel cell includes a shield line which extends athwart the coupling portion, where the shield line is to reduce a parasitic capacitance of the reset transistor to the floating diffusion node.

公开(公告)号：US20130082313A1

公开(公告)日：2013-04-04

申请号：US13251036

申请日：2011-09-30

Applicant: Sohei Manabe

Inventor： Sohei Manabe

IPC: H01L27/146

CPC classification number: H01L27/14603 ,  H01L27/14609 ,  H01L27/14641 ,  H01L27/14645

Abstract: Techniques and mechanisms to improve potential well characteristics in a pixel cell. In an embodiment, a coupling portion of a pixel cell couples a reset transistor of the pixel cell to a floating diffusion node of the pixel cell, the reset transistor to reset a voltage of the floating diffusion node. In another embodiment, the pixel cell includes a shield line which extends athwart the coupling portion, where the shield line is to reduce a parasitic capacitance of the reset transistor to the floating diffusion node.

Abstract translation: 改善像素单元中潜在井特性的技术和机制。 在一个实施例中，像素单元的耦合部分将像素单元的复位晶体管耦合到像素单元的浮动扩散节点，复位晶体管复位浮动扩散节点的电压。 在另一个实施例中，像素单元包括屏蔽线，其延伸到耦合部分，屏蔽线将降低复位晶体管对浮动扩散节点的寄生电容。

公开(公告)号：US20090200580A1

公开(公告)日：2009-08-13

申请号：US12028679

申请日：2008-02-08

Applicant: Howard E. Rhodes ,  Hidetoshi Nozaki ,  Sohei Manabe

Inventor： Howard E. Rhodes ,  Hidetoshi Nozaki ,  Sohei Manabe

IPC: H01L27/148 ,  H01L31/18

CPC classification number: H01L27/14609 ,  H01L27/14603 ,  H01L27/1464 ,  H01L27/14689

Abstract: What is disclosed is an apparatus comprising a transfer gate formed on a substrate and a photodiode formed in the substrate next to the transfer gate. The photodiode comprises a shallow N-type collector formed in the substrate, a deep N-type collector formed in the substrate, wherein a lateral side of the deep N-type collector extends at least under the transfer gate, and a connecting N-type collector formed in the substrate between the deep N-type collector and the shallow N-type collector, wherein the connecting implant connects the deep N-type collector and the shallow N-type collector. Also disclosed is a process comprising forming a deep N-type collector in the substrate, forming a shallow N-type collector formed in the substrate, and forming a connecting N-type collector in the substrate between the deep N-type collector and the shallow N-type collector, wherein the connecting implant connects the deep N-type collector and the shallow N-type collector. A transfer gate is formed on the substrate next to the deep photodiode, wherein a lateral side of the deep N-type collector extends at least under the transfer gate. Other embodiments are disclosed and claimed.

Abstract translation: 所公开的是一种装置，其包括形成在基板上的转移栅极和形成在基板旁边的光电二极管。 光电二极管包括形成在基板中的浅N型集电体，形成在基板中的深N型集电体，其中深N型集电极的侧面至少在传输栅极下延伸，并且连接N型 在深N型集电体和浅N型集电体之间的基板中形成的集电体，其中连接注入物连接深N型集电极和浅N型集电极。 还公开了一种方法，包括在衬底中形成深N型集电体，形成在衬底中形成的浅N型集电体，并且在深N型集电极和浅层之间的衬底中形成连接的N型集电体 N型集电器，其中连接注入件连接深N型集电器和浅N型集电器。 在靠近深度光电二极管的衬底上形成传输栅极，其中深N型集电极的侧面至少在传输栅极下方延伸。 公开和要求保护其他实施例。

公开(公告)号：US20090128660A1

公开(公告)日：2009-05-21

申请号：US11942604

申请日：2007-11-19

Applicant: Tiejun Dai ,  Sohei Manabe ,  Hongtao Yao ,  Jingzhou Zhang ,  Liping Deng

Inventor： Tiejun Dai ,  Sohei Manabe ,  Hongtao Yao ,  Jingzhou Zhang ,  Liping Deng

IPC: G01J1/18 ,  H04N5/217

CPC classification number: H04N5/14 ,  H01L31/1105 ,  H04N5/144 ,  H04N5/235 ,  H04N5/2357 ,  H04N5/3765

Abstract: An apparatus for measuring the power frequency of a light source includes a photo-sensitive transistor, a modulators and a logic unit. The photo-sensitive transistor generates an electrical signal that is responsive to light incident thereon from the light source. The modulator generates a modulated signal based on the electrical signal that toggles at a rate substantially proportional to the power frequency of the light source. The logic unit is coupled to receive the modulated signal and determine its toggling frequency.

Abstract translation: 用于测量光源的功率频率的装置包括光敏晶体管，调制器和逻辑单元。 光敏晶体管产生响应于从光源入射到其上的光的电信号。 调制器基于电信号产生调制信号，该电信号以基本上与光源的功率频率成比例的速率切换。 逻辑单元被耦合以接收调制信号并确定其切换频率。

公开(公告)号：US20050274874A1

公开(公告)日：2005-12-15

申请号：US10867020

申请日：2004-06-14

Applicant: Hidetoshi Nozaki ,  Sohei Manabe

Inventor： Hidetoshi Nozaki ,  Sohei Manabe

IPC: H01L27/146 ,  H01L27/00

CPC classification number: H01L27/14689 ,  H01L27/14603

Abstract: The present disclosure introduces a simple method for reducing the capacitance of the floating diffusion node of a CMOS image sensor and consequently improving the image sensor's sensitivity. While reducing parasitic capacitances such as the capacitance between the transfer gate and the floating node, the proposed device layouts, in which the channel width of the detection section is different from the channel width of the photoelectric conversion element, demand no more than what is required for the fabrication of the traditional layouts.

Abstract translation: 本公开引入了用于减小CMOS图像传感器的浮动扩散节点的电容并因此提高图像传感器灵敏度的简单方法。 在降低诸如传输门和浮动节点之间的电容的寄生电容的同时，所提出的器件布局（其中检测部分的沟道宽度与光电转换元件的沟道宽度不同）仅需要所需的 用于制作传统布局。