摘要:
A method for adjusting the voltage and frequency to minimize power dissipation in a processor. The method of one embodiment comprises determining a power consumption value. The power consumption value is evaluated to obtain a new operating point. The new operating point is compared with a present operating point. A frequency setting and a voltage setting are adjusted to correspond to the new operating point if the new operating point is different from the present operating point.
摘要:
A processor includes a digital throttle to monitor the activity of various units of the processor's instruction execution pipeline, and to determine a power state for the processor from the monitored activity. One of two or more power control mechanisms is engaged, responsive to the power state of the processor reaching a threshold.
摘要:
A processor includes a digital throttle to monitor the activity of various units of the processor's instruction execution pipeline. The monitored activity is scaled according to the current operating point of the processor and a power state is determined from the scaled activity. If the power state reaches a first threshold, the operating point of the processor is adjusted and a new scaling factor is selected to determine the power state.
摘要:
A method for adjusting the voltage and frequency to minimize power dissipation in a processor. The method of one embodiment comprises determining a power consumption value. The power consumption value is evaluated to obtain a new operating point. The new operating point is compared with a present operating point. A frequency setting and a voltage setting are adjusted to correspond to the new operating point if the new operating point is different from the present operating point.
摘要:
With some transmitter embodiments disclosed herein, static power consumption in low power modes may be reduced without excessively increasing latency.
摘要:
In an embodiment, a processor includes voltage calculation logic to calculate a plurality of maximum operating voltage values each associated with a number of active cores of the plurality of cores, based at least in part on a plurality of coefficient values. In this way, the processor can operate at different maximum operating voltages dependent on the number of active cores. Other embodiments are described and claimed.
摘要:
With some transmitter embodiments disclosed herein, static power consumption in low power modes may be reduced without excessively increasing latency.
摘要:
A method and apparatus for compensating for current-change induced voltage changes is disclosed. In one embodiment, a digital throttle unit coupled to an instruction pipeline may generate a compensating current signal, which may then cause a dummy load to consume a compensating current. In another embodiment, a counter responsive to changes in clock frequency may generate a ramp current signal, which may then cause a dummy load to consume a current corresponding to the ramp current signal.
摘要:
The present invention provides a mechanism for adjusting the activity of an integrated digital circuit such as a processor to reduce voltage changes attributable to current changes triggered by clock gating. The processor includes one or more functional units and a current control circuit that monitors activity states of the processor's functional units to estimate the current consumed over n clock cycles. The current control circuit estimates the current change for a given clock cycle from the n activity states and compares the estimated current change with first and second thresholds. The processors activity is decreased if the estimated current change is greater than the first threshold, and the processor activity is decreased if the estimated current change is less than the second threshold.
摘要:
A power delivery system includes a circuit board, a power consuming module and a dc--dc converter. The printed circuit board has on it a first signal connector, a pair of first contacts to which a first voltage is supplied, spaced from said connector, and fasteners spaced from said pair of first contacts. The power consuming module has a second signal connector, mating with the first signal connector, and has respective upper and lower power pads for receiving low voltage power. The dc--dc converter converts the first voltage to a lower voltage. The dc--dc converter has a pair of second contacts contacting said pair of first contacts, surfaces mating with said fasteners and holding the converter on the printed circuit board such that said second contacts are in firm contact with said first contacts, and a laterally extending connector having upper and lower contacts supplying the lower voltage and engaging the upper and lower power pads of the power consuming module.