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1.
公开(公告)号:US20190267499A1
公开(公告)日:2019-08-29
申请号:US16292112
申请日:2019-03-04
申请人: SunPower Corporation
IPC分类号: H01L31/0224 , H01L31/0745 , H01L31/0236 , H01L31/0216 , H01L31/0352
摘要: Methods of fabricating solar cell emitter regions with differentiated P-type and N-type regions architectures, and resulting solar cells, are described. In an example, a back contact solar cell can include a substrate having a light-receiving surface and a back surface. A first polycrystalline silicon emitter region of a first conductivity type is disposed on a first thin dielectric layer disposed on the back surface of the substrate. A second polycrystalline silicon emitter region of a second, different, conductivity type is disposed on a second thin dielectric layer disposed on the back surface of the substrate. A third thin dielectric layer is disposed over an exposed outer portion of the first polycrystalline silicon emitter region and is disposed laterally directly between the first and second polycrystalline silicon emitter regions. A first conductive contact structure is disposed on the first polycrystalline silicon emitter region. A second conductive contact structure is disposed on the second polycrystalline silicon emitter region. Metallization methods, include etching techniques for forming a first and second conductive contact structure are also described.
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公开(公告)号:US11437530B2
公开(公告)日:2022-09-06
申请号:US16292112
申请日:2019-03-04
申请人: SunPower Corporation
IPC分类号: H01L31/0224 , H01L31/0216 , H01L31/0236 , H01L31/0745 , H01L31/0352
摘要: Methods of fabricating solar cell emitter regions with differentiated P-type and N-type regions architectures, and resulting solar cells, are described. In an example, a back contact solar cell can include a substrate having a light-receiving surface and a back surface. A first polycrystalline silicon emitter region of a first conductivity type is disposed on a first thin dielectric layer disposed on the back surface of the substrate. A second polycrystalline silicon emitter region of a second, different, conductivity type is disposed on a second thin dielectric layer disposed on the back surface of the substrate. A third thin dielectric layer is disposed over an exposed outer portion of the first polycrystalline silicon emitter region and is disposed laterally directly between the first and second polycrystalline silicon emitter regions. A first conductive contact structure is disposed on the first polycrystalline silicon emitter region. A second conductive contact structure is disposed on the second polycrystalline silicon emitter region. Metallization methods, include etching techniques for forming a first and second conductive contact structure are also described.
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公开(公告)号:US20220262966A1
公开(公告)日:2022-08-18
申请号:US17738984
申请日:2022-05-06
申请人: SunPower Corporation
IPC分类号: H01L31/0224 , H01L31/0236 , H01L31/0747 , H01L31/05 , H01L31/068 , H01L31/18 , H01L31/20 , H01L31/0352 , H01L31/0745
摘要: Tri-layer semiconductor stacks for patterning features on solar cells, and the resulting solar cells, are described herein. In an example, a solar cell includes a substrate. A semiconductor structure is disposed above the substrate. The semiconductor structure includes a P-type semiconductor layer disposed directly on a first semiconductor layer. A third semiconductor layer is disposed directly on the P-type semiconductor layer. An outermost edge of the third semiconductor layer is laterally recessed from an outermost edge of the first semiconductor layer by a width. An outermost edge of the P-type semiconductor layer is sloped from the outermost edge of the third semiconductor layer to the outermost edge of the third semiconductor layer. A conductive contact structure is electrically connected to the semiconductor structure.
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公开(公告)号:US11355654B2
公开(公告)日:2022-06-07
申请号:US16707975
申请日:2019-12-09
申请人: SunPower Corporation
IPC分类号: H01L31/0224 , H01L31/0236 , H01L31/0747 , H01L31/05 , H01L31/068 , H01L31/18 , H01L31/20 , H01L31/0352 , H01L31/0745
摘要: Tri-layer semiconductor stacks for patterning features on solar cells, and the resulting solar cells, are described herein. In an example, a solar cell includes a substrate. A semiconductor structure is disposed above the substrate. The semiconductor structure includes a P-type semiconductor layer disposed directly on a first semiconductor layer. A third semiconductor layer is disposed directly on the P-type semiconductor layer. An outermost edge of the third semiconductor layer is laterally recessed from an outermost edge of the first semiconductor layer by a width. An outermost edge of the P-type semiconductor layer is sloped from the outermost edge of the third semiconductor layer to the outermost edge of the third semiconductor layer. A conductive contact structure is electrically connected to the semiconductor structure.
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公开(公告)号:US20190189813A1
公开(公告)日:2019-06-20
申请号:US16284988
申请日:2019-02-25
申请人: SunPower Corporation
IPC分类号: H01L31/0224 , H01L31/0745 , H01L31/0352 , H01L31/068 , H01L31/05 , H01L31/0236 , H01L31/0747
CPC分类号: H01L31/022441 , H01L31/022425 , H01L31/02363 , H01L31/035281 , H01L31/0516 , H01L31/0682 , H01L31/0745 , H01L31/0747 , Y02E10/50 , Y02E10/546 , Y02E10/547 , Y02E10/548
摘要: Tri-layer semiconductor stacks for patterning features on solar cells, and the resulting solar cells, are described herein. In an example, a solar cell includes a substrate. A semiconductor structure is disposed above the substrate. The semiconductor structure includes a P-type semiconductor layer disposed directly on a first semiconductor layer. A third semiconductor layer is disposed directly on the P-type semiconductor layer. An outermost edge of the third semiconductor layer is laterally recessed from an outermost edge of the first semiconductor layer by a width. An outermost edge of the P-type semiconductor layer is sloped from the outermost edge of the third semiconductor layer to the outermost edge of the third semiconductor layer. A conductive contact structure is electrically connected to the semiconductor structure.
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公开(公告)号:US20180175221A1
公开(公告)日:2018-06-21
申请号:US15384061
申请日:2016-12-19
申请人: SUNPOWER CORPORATION
IPC分类号: H01L31/0236 , H01L31/068 , H01L31/0368 , H01L31/18
CPC分类号: H01L31/02363 , H01L31/03682 , H01L31/068 , H01L31/1804
摘要: Methods of fabricating solar cell emitter regions with differentiated P-type and N-type region architectures, and the resulting solar cells, are described herein. In an example, a solar cell includes an N-type semiconductor substrate having a light-receiving surface and a back surface. A plurality of N-type polycrystalline silicon regions is disposed on a first thin dielectric layer disposed on the back surface of the N-type semiconductor substrate. A plurality of P-type polycrystalline silicon regions is disposed on a second thin dielectric layer disposed in a corresponding one of a plurality of trenches interleaving the plurality of N-type polycrystalline silicon regions in the back surface of the N-type semiconductor substrate.
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7.
公开(公告)号:US11502208B2
公开(公告)日:2022-11-15
申请号:US16679012
申请日:2019-11-08
申请人: SunPower Corporation
发明人: Seung Bum Rim , David D. Smith , Taiqing Qiu , Staffan Westerberg , Kieran Mark Tracy , Venkatasubramani Balu
IPC分类号: H01L31/0224 , H01L31/068 , H01L31/20 , H01L31/0216 , H01L31/0745 , H01L31/0747 , H01L31/18 , H01L31/0236 , H01L31/0368
摘要: Methods of fabricating solar cell emitter regions with differentiated P-type and N-type regions architectures, and resulting solar cells, are described. In an example, a back contact solar cell includes a substrate having a light-receiving surface and a back surface. A first polycrystalline silicon emitter region of a first conductivity type is disposed on a first thin dielectric layer disposed on the back surface of the substrate. A second polycrystalline silicon emitter region of a second, different, conductivity type is disposed on a second thin dielectric layer disposed on the back surface of the substrate. A third thin dielectric layer is disposed laterally directly between the first and second polycrystalline silicon emitter regions. A first conductive contact structure is disposed on the first polycrystalline silicon emitter region. A second conductive contact structure is disposed on the second polycrystalline silicon emitter region.
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公开(公告)号:US20190097068A1
公开(公告)日:2019-03-28
申请号:US16199783
申请日:2018-11-26
申请人: SunPower Corporation
IPC分类号: H01L31/0236 , H01L31/0368 , H01L31/068 , H01L31/18
摘要: Methods of fabricating solar cell emitter regions with differentiated P-type and N-type region architectures, and the resulting solar cells, are described herein. In an example, a solar cell includes an N-type semiconductor substrate having a light-receiving surface and a back surface. A plurality of N-type polycrystalline silicon regions is disposed on a first thin dielectric layer disposed on the back surface of the N-type semiconductor substrate. A plurality of P-type polycrystalline silicon regions is disposed on a second thin dielectric layer disposed in a corresponding one of a plurality of trenches interleaving the plurality of N-type polycrystalline silicon regions in the back surface of the N-type semiconductor substrate.
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公开(公告)号:US10141462B2
公开(公告)日:2018-11-27
申请号:US15384061
申请日:2016-12-19
申请人: SUNPOWER CORPORATION
IPC分类号: H01L31/044 , H01L31/0236 , H01L31/068 , H01L31/0368 , H01L31/18
摘要: Methods of fabricating solar cell emitter regions with differentiated P-type and N-type region architectures, and the resulting solar cells, are described herein. In an example, a solar cell includes an N-type semiconductor substrate having a light-receiving surface and a back surface. A plurality of N-type polycrystalline silicon regions is disposed on a first thin dielectric layer disposed on the back surface of the N-type semiconductor substrate. A plurality of P-type polycrystalline silicon regions is disposed on a second thin dielectric layer disposed in a corresponding one of a plurality of trenches interleaving the plurality of N-type polycrystalline silicon regions in the back surface of the N-type semiconductor substrate.
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公开(公告)号:US09837259B2
公开(公告)日:2017-12-05
申请号:US14473857
申请日:2014-08-29
申请人: SUNPOWER CORPORATION
CPC分类号: H01L21/02019 , H01L21/02052 , H01L31/1804 , Y02E10/547 , Y02P70/521
摘要: A method of processing a silicon substrate can include etching the silicon substrate with a first etchant having a first concentration and etching with a second etchant having a second concentration. In an embodiment, the second concentration of the second etchant can be greater than the first concentration of the first etchant. In one embodiment, the first etchant can be a different type of etchant than the second etchant. In an embodiment, the first and second etchant can be the same type of etchant. In some embodiments the silicon substrate can be cleaned with a first cleaning solution to remove contaminants from the silicon substrate prior to etching with the first etchant. In an embodiment, the silicon substrate can be cleaned with a second cleaning solution after etching the silicon substrate with a second etchant.
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