公开(公告)号：US09274552B2

公开(公告)日：2016-03-01

申请号：US13279773

申请日：2011-10-24

申请人： Sung-Ho Ahn ,  Ji-Hoon Park

发明人： Sung-Ho Ahn ,  Ji-Hoon Park

IPC分类号： G06F1/16 ,  E05D7/00 ,  G09G5/00

CPC分类号： G06F1/1616 ,  G06F1/1615 ,  G06F1/1618 ,  G06F1/162 ,  G06F1/1641 ,  G06F1/1681

摘要： Provided is a portable communication device including a first housing, a second housing rotatably coupled with the first housing, and a hinge portion provided between the first housing and the second housing to stepwise rotate the second housing toward or away from the first housing, in which display units are disposed on inner and outer sides of the first housing and the second housing, respectively, such that the display units on the inner and outer surfaces of the housings may be used independently or in conjunction to provide for larger display screens.

摘要翻译： 提供了一种便携式通信设备，包括第一壳体，与第一壳体可旋转地联接的第二壳体和设置在第一壳体和第二壳体之间的铰链部分，以使第二壳体朝向或远离第一壳体逐步旋转，其中 显示单元分别设置在第一壳体和第二壳体的内侧和外侧上，使得壳体的内表面和外表面上的显示单元可以独立地或结合使用以提供更大的显示屏。

公开(公告)号：US08701249B2

公开(公告)日：2014-04-22

申请号：US13451811

申请日：2012-04-20

申请人： Sung-Ho Ahn ,  Ji-Hoon Park

发明人： Sung-Ho Ahn ,  Ji-Hoon Park

IPC分类号： E05D11/10

CPC分类号： H04M1/0216 ,  G06F1/1616 ,  G06F1/1681 ,  Y10T16/53834 ,  Y10T16/540243 ,  Y10T16/540247 ,  Y10T16/540255 ,  Y10T16/557

摘要： A hinge device in a portable terminal is provided, in which a first driving cam is fixed to one end of a hinge shaft by a locking device, for rotating, a second driving cam is provided at the other end of the hinge shaft, for rotating together with the first driving cam and making a linear reciprocal motion along the hinge shaft, a driven cam is interposed between the first and second driving cams, for making a linear reciprocal motion along the hinge shaft as a cam motion with the first and second driving cams, and an elastic member is interposed between a hinge housing and the second driving cam.

摘要翻译： 提供了一种便携式终端中的铰链装置，其中通过锁定装置将第一驱动凸轮固定到铰链轴的一端以进行旋转，第二驱动凸轮设置在铰链轴的另一端，用于旋转 与第一驱动凸轮一起沿着铰链轴进行线性往复运动，从动凸轮插入在第一和第二驱动凸轮之间，用于沿着铰链轴进行线性往复运动，作为具有第一和第二驱动的凸轮运动 凸轮，并且弹性构件插入在铰链壳体和第二驱动凸轮之间。

公开(公告)号：US09027205B2

公开(公告)日：2015-05-12

申请号：US13532924

申请日：2012-06-26

申请人： Sung-Ho Ahn ,  Ji-Hoon Park ,  Kun-Woo Baek

发明人： Sung-Ho Ahn ,  Ji-Hoon Park ,  Kun-Woo Baek

IPC分类号： E05D7/00 ,  H04M1/02 ,  G06F1/16 ,  E05D3/12 ,  E05D11/06 ,  E05F1/12

CPC分类号： H04M1/022 ,  E05D3/122 ,  E05D11/06 ,  E05F1/1223 ,  E05Y2900/606 ,  G06F1/1681 ,  Y10T16/541 ,  Y10T29/49947

摘要： A gear cam mounting device in a dual-hinge device for a portable terminal is provided, in which first and second hinge shafts provide first and second parallel hinge axes, respectively, first and second gear cams are fixed around the first and second hinge shafts, in engagement with each other, and first and second locking units penetrate respectively through the first and second gear cams in a direction that is perpendicular to the first and second hinge axes, for locking the first and second gear cams to surround the first and second hinge shafts.

摘要翻译： 提供了一种用于便携式终端的双铰链装置中的齿轮凸轮安装装置，其中第一和第二铰链轴分别提供第一和第二平行铰链轴，第一和第二齿轮凸轮固定在第一和第二铰链轴周围， 彼此接合，并且第一和第二锁定单元在垂直于第一和第二铰链轴线的方向上分别穿过第一和第二齿轮凸轮，用于锁定第一和第二齿轮凸轮以围绕第一和第二铰链 轴。

公开(公告)号：US08925582B2

公开(公告)日：2015-01-06

申请号：US13516598

申请日：2010-12-08

申请人： Chang-Hoon Lee ,  Eui-Dong Roh ,  Ji-Hoon Park ,  Ki-Ryong Lee

发明人： Chang-Hoon Lee ,  Eui-Dong Roh ,  Ji-Hoon Park ,  Ki-Ryong Lee

IPC分类号： F16K31/06 ,  F15B13/04 ,  F16K31/02 ,  F01L13/00 ,  F01L1/344

CPC分类号： F01L13/00 ,  F01L2001/3443 ,  F16K31/0665 ,  Y10T137/777 ,  Y10T137/87217 ,  Y10T137/87241

摘要： The present invention relates to an oil control valve for a variable valve lift system that obtains in a stable manner a constant hydraulic pressure in the hydraulic line connecting the oil control valve and the vale lift control actuator, and thereby reliably controls valve lift according to the number of revolutions and load of the engine.

摘要翻译： 本发明涉及一种用于可变气门升程系统的油控阀，其在连接油控制阀和阀升程控制致动器的液压管路中稳定地获得恒定的液压，从而可靠地根据 发动机的转数和负载。

公开(公告)号：US07863110B2

公开(公告)日：2011-01-04

申请号：US11907994

申请日：2007-10-19

申请人： Tea-Kwang Yu ,  Kong-Sam Jang ,  Kwang-Tae Kim ,  Ji-Hoon Park ,  Eun-Mi Hong

发明人： Tea-Kwang Yu ,  Kong-Sam Jang ,  Kwang-Tae Kim ,  Ji-Hoon Park ,  Eun-Mi Hong

IPC分类号： H01L21/332 ,  H01L31/119 ,  H01L23/58

CPC分类号： H01L29/861 ,  H01L21/76224 ,  H01L27/105 ,  H01L27/1052

摘要： A semiconductor device includes a device isolation layer on a semiconductor substrate defining an active region in the semiconductor substrate, a low voltage well of a first conductivity type in the active region of the semiconductor substrate, a high voltage impurity region of a second conductivity type in the active region of the semiconductor substrate, the high voltage impurity region positioned in an upper portion of the low voltage well, a high concentration impurity region of the second conductivity type within the high voltage impurity region and spaced apart from the device isolation layer, and a floating impurity region of the first conductivity type between the device isolation layer and the high concentration impurity region, the floating impurity region being a portion of an upper surface of the active region.

摘要翻译： 半导体器件包括在半导体衬底上限定半导体衬底中的有源区的器件隔离层，在半导体衬底的有源区中具有第一导电类型的低电压阱，第二导电类型的高电压杂质区 半导体衬底的有源区，位于低压阱上部的高电压杂质区，高电压杂质区内的第二导电类型的高浓度杂质区，与器件隔离层间隔开;以及 在器件隔离层和高浓度杂质区之间的第一导电类型的浮置杂质区，浮置杂质区是有源区的上表面的一部分。

公开(公告)号：US20080093701A1

公开(公告)日：2008-04-24

申请号：US11907994

申请日：2007-10-19

申请人： Tea-Kwang Yu ,  Kong-Sam Jang ,  Kwang-Tae Kim ,  Ji-Hoon Park ,  Eun-Mi Hong

发明人： Tea-Kwang Yu ,  Kong-Sam Jang ,  Kwang-Tae Kim ,  Ji-Hoon Park ,  Eun-Mi Hong

IPC分类号： H01L29/00 ,  H01L21/761

CPC分类号： H01L29/861 ,  H01L21/76224 ,  H01L27/105 ,  H01L27/1052

摘要： A semiconductor device includes a device isolation layer on a semiconductor substrate defining an active region in the semiconductor substrate, a low voltage well of a first conductivity type in the active region of the semiconductor substrate, a high voltage impurity region of a second conductivity type in the active region of the semiconductor substrate, the high voltage impurity region positioned in an upper portion of the low voltage well, a high concentration impurity region of the second conductivity type within the high voltage impurity region and spaced apart from the device isolation layer, and a floating impurity region of the first conductivity type between the device isolation layer and the high concentration impurity region, the floating impurity region being a portion of an upper surface of the active region.

摘要翻译： 半导体器件包括在半导体衬底上限定半导体衬底中的有源区的器件隔离层，在半导体衬底的有源区中具有第一导电类型的低电压阱，第二导电类型的高电压杂质区 半导体衬底的有源区，位于低压阱上部的高电压杂质区，高电压杂质区内的第二导电类型的高浓度杂质区，与器件隔离层间隔开;以及 在器件隔离层和高浓度杂质区之间的第一导电类型的浮置杂质区，浮置杂质区是有源区的上表面的一部分。

公开(公告)号：US20060108610A1

公开(公告)日：2006-05-25

申请号：US11329217

申请日：2006-01-10

申请人： Sung-Taeg Kang ,  Jeong-Uk Han ,  Sung-Woo Park ,  Seung-Beom Yoon ,  Ji-Hoon Park ,  Bo-Young Seo

发明人： Sung-Taeg Kang ,  Jeong-Uk Han ,  Sung-Woo Park ,  Seung-Beom Yoon ,  Ji-Hoon Park ,  Bo-Young Seo

IPC分类号： H01L29/76 ,  H01L29/745

CPC分类号： H01L21/28273 ,  H01L21/0214 ,  H01L21/3144 ,  H01L29/513 ,  H01L29/7881

摘要： In a method for forming a semiconductor device and a semiconductor device formed in accordance with the method, a thin dielectric layer is provided between a lower conductive layer and an upper conductive layer. In one embodiment, the thin dielectric layer comprises an inter-gate dielectric layer, the lower conductive layer comprises a floating gate and the upper dielectric layer comprises a control gate of a transistor, for example, a non-volatile memory cell transistor. The thin dielectric layer is formed using a heat treating process that results in reduction of surface roughness of the underlying floating gate, and results in a thin silicon oxy-nitride layer being formed on the floating gate. In this manner, the thin dielectric layer provides for increased capacitive coupling between the lower floating gate and the upper control gate. This also leads to a lowered programming voltage, erasing voltage and read voltage for the transistor, while maintaining the threshold voltage in a desired range. In addition, the size of the transistor and resulting storage cell can be minimized and the need for a high-voltage region in the circuit is mitigated, since, assuming a lowered programming voltage, pumping circuitry is not required.

公开(公告)号：US07041557B2

公开(公告)日：2006-05-09

申请号：US10832952

申请日：2004-04-27

申请人： Sung-Taeg Kang ,  Jeong-Uk Han ,  Sung-Woo Park ,  Seung-Beom Yoon ,  Ji-Hoon Park ,  Bo-Young Seo

发明人： Sung-Taeg Kang ,  Jeong-Uk Han ,  Sung-Woo Park ,  Seung-Beom Yoon ,  Ji-Hoon Park ,  Bo-Young Seo

IPC分类号： H01L21/366

CPC分类号： H01L21/0214 ,  H01L21/02249 ,  H01L21/02252 ,  H01L21/28273 ,  H01L21/3144

摘要： In a method for forming a semiconductor device and a semiconductor device formed in accordance with the method, a thin dielectric layer is provided between a lower conductive layer and an upper conductive layer. In one embodiment, the thin dielectric layer comprises an inter-gate dielectric layer, the lower conductive layer comprises a floating gate and the upper dielectric layer comprises a control gate of a transistor, for example, a non-volatile memory cell transistor. The thin dielectric layer is formed using a heat treating process that results in reduction of surface roughness of the underlying floating gate, and results in a thin silicon oxy-nitride layer being formed on the floating gate. In this manner, the thin dielectric layer provides for increased capacitive coupling between the lower floating gate and the upper control gate. This also leads to a lowered programming voltage, erasing voltage and read voltage for the transistor, while maintaining the threshold voltage in a desired range. In addition, the size of the transistor and resulting storage cell can be minimized and the need for a high-voltage region in the circuit is mitigated, since, assuming a lowered programming voltage, pumping circuitry is not required.

摘要翻译： 在根据该方法形成的半导体器件和半导体器件的形成方法中，在下导电层和上导电层之间设置有薄的电介质层。 在一个实施例中，薄介电层包括栅极间电介质层，下导电层包括浮动栅极，上介电层包括晶体管的控制栅极，例如非易失性存储单元晶体管。 使用导致下面的浮置栅极的表面粗糙度降低的热处理工艺形成薄介电层，并且导致在浮动栅极上形成薄的氧氮化硅层。 以这种方式，薄介电层提供在下浮动栅极和上控制栅极之间增加的电容耦合。 这也导致降低的编程电压，擦除晶体管的电压和读取电压，同时将阈值电压保持在期望的范围内。 此外，晶体管和所得到的存储单元的尺寸可以被最小化，并且减轻了对电路中的高电压区域的需要，因为假设降低的编程电压，不需要泵浦电路。

公开(公告)号：US20070132005A1

公开(公告)日：2007-06-14

申请号：US11562223

申请日：2006-11-21

申请人： Young-Ho Kim ,  Yong-Tae Kim ,  Weon-Ho Park ,  Kyoung-Hwan Kim ,  Ji-Hoon Park

发明人： Young-Ho Kim ,  Yong-Tae Kim ,  Weon-Ho Park ,  Kyoung-Hwan Kim ,  Ji-Hoon Park

IPC分类号： H01L21/336

CPC分类号： H01L27/0207 ,  H01L27/115 ,  H01L27/11519 ,  H01L27/11521 ,  H01L27/11524

摘要： An electrically erasable and programmable read only memory (EEPROM) is fabricated by forming isolation patterns defining active regions in predetermined regions of a semiconductor substrate including a memory transistor region and a selection transistor region. A gate insulating layer having tunnel regions is formed on the active regions. A first conductive layer is formed on the resultant structure having the gate insulating layer. The first conductive layer is patterned to form openings exposing top surfaces of the isolation patterns. The patterning takes place such that a distance between a selected opening and the active region adjacent the opening varies depending on the width of the isolation pattern disposed under the opening. Related EEPROM devices are also disclosed.

摘要翻译： 通过在包括存储晶体管区域和选择晶体管区域的半导体衬底的预定区域中形成限定有源区域的隔离图案来制造电可擦除和可编程只读存储器（EEPROM）。 在有源区上形成具有隧道区的栅极绝缘层。 在具有栅极绝缘层的所得结构上形成第一导电层。 图案化第一导电层以形成露出隔离图案顶表面的开口。 进行图案化，使得所选择的开口和邻近开口的有源区域之间的距离根据设置在开口下方的隔离图案的宽度而变化。 还公开了相关的EEPROM器件。

公开(公告)号：US20060270156A1

公开(公告)日：2006-11-30

申请号：US11246454

申请日：2005-10-07

申请人： Seong-Gyun Kim ,  Ji-Hoon Park ,  Sang-Woo Kang ,  Sung-Woo Park

发明人： Seong-Gyun Kim ,  Ji-Hoon Park ,  Sang-Woo Kang ,  Sung-Woo Park

IPC分类号： H01L21/336 ,  H01L29/788

CPC分类号： H01L21/28273 ,  H01L27/11524 ,  H01L29/42324 ,  H01L29/66825 ,  H01L29/7881

摘要： A non-volatile memory device includes an upwardly protruding fin disposed on a substrate and a control gate electrode crossing the fin. A floating gate is interposed between the control gate electrode and the fin and includes a first storage gate and a second storage gate. The first storage gate is disposed on a sidewall of the fin, and the second storage gate is disposed on a top surface of the fin and is connected to the first storage gate. A first insulation layer is interposed between the first storage gate and the sidewall of the fin, and a second insulation layer is interposed between the second storage gate and the top surface of the fin. The second insulation layer is thinner than the first insulation layer. A blocking insulation pattern is interposed between the control gate electrode and the floating gate.

摘要翻译： 非易失性存储器件包括设置在衬底上的向上突出的翅片和跨过鳍片的控制栅电极。 浮栅位于控制栅极和鳍之间，并包括第一存储栅和第二存储栅。 第一存储门设置在翅片的侧壁上，第二存储栅极设置在鳍的顶表面上，并连接到第一存储门。 第一绝缘层插入在第一存储栅极和鳍片的侧壁之间，第二绝缘层插入在第二存储栅极和鳍的顶表面之间。 第二绝缘层比第一绝缘层薄。 在控制栅电极和浮栅之间插入阻挡绝缘图案。