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    Method for bin-based control
    1.
    发明授权
    Method for bin-based control 有权
    基于bin的控制方法

    公开(公告)号：US08041451B2

    公开(公告)日：2011-10-18

    申请号：US12427154

    申请日：2009-04-21

    申请人： Sunny Wu ,  Chih-Sheng Shih ,  Andy Tsen ,  Jo Fei Wang ,  Jong-I Mou ,  Hsin Kuan

    发明人： Sunny Wu ,  Chih-Sheng Shih ,  Andy Tsen ,  Jo Fei Wang ,  Jong-I Mou ,  Hsin Kuan

    IPC分类号： G06F7/00 ,  G06F19/00 ,  G06F17/00 ,  G06Q10/00

    CPC分类号： G05B19/41865 ,  G05B2219/32097 ,  G05B2219/32256 ,  G05B2219/32324 ,  G05B2219/45031 ,  G06Q10/087 ,  Y02P90/14 ,  Y02P90/20

    摘要： A method for providing bin-based control when manufacturing integrated circuit devices is disclosed. The method comprises performing a plurality of processes on a plurality of wafer lots; determining a required bin quantity, an actual bin quantity, and a projected bin quantity; comparing the determined required bin quantity with the determined actual bin quantity and determined projected bin quantity; and modifying at least one of the plurality of processes on the plurality of wafer lots if the determined actual bin quantity and determined projected bin quantity fail to satisfy the determined required bin quantity.

    摘要翻译： 公开了一种在制造集成电路器件时提供基于bin的控制的方法。 该方法包括在多个晶片批次上执行多个处理; 确定所需的仓数量，实际箱数量和投影箱数量; 将确定的所需仓量与确定的实际箱数量和确定的预计仓量进行比较; 以及如果所确定的实际仓量和确定的投影箱数量不能满足所确定的所需仓量，则修改多个晶片批次上的多个处理中的至少一个。

    METHOD FOR BIN-BASED CONTROL
    2.
    发明申请
    METHOD FOR BIN-BASED CONTROL 有权
    基于BIN的控制方法

    公开(公告)号：US20100268367A1

    公开(公告)日：2010-10-21

    申请号：US12427154

    申请日：2009-04-21

    申请人： Sunny Wu ,  Chih-Sheng Shih ,  Andy Tsen ,  Jo Fei Wang ,  Jong-I Mou ,  Hsin Kuan

    发明人： Sunny Wu ,  Chih-Sheng Shih ,  Andy Tsen ,  Jo Fei Wang ,  Jong-I Mou ,  Hsin Kuan

    IPC分类号： G06F17/00

    CPC分类号： G05B19/41865 ,  G05B2219/32097 ,  G05B2219/32256 ,  G05B2219/32324 ,  G05B2219/45031 ,  G06Q10/087 ,  Y02P90/14 ,  Y02P90/20

    摘要： A method for providing bin-based control when manufacturing integrated circuit devices is disclosed. The method comprises performing a plurality of processes on a plurality of wafer lots; determining a required bin quantity, an actual bin quantity, and a projected bin quantity; comparing the determined required bin quantity with the determined actual bin quantity and determined projected bin quantity; and modifying at least one of the plurality of processes on the plurality of wafer lots if the determined actual bin quantity and determined projected bin quantity fail to satisfy the determined required bin quantity.

    摘要翻译： 公开了一种在制造集成电路器件时提供基于bin的控制的方法。 该方法包括在多个晶片批次上执行多个处理; 确定所需的仓数量，实际箱数量和投影箱数量; 将确定的所需仓量与确定的实际箱数量和确定的预计仓量进行比较; 以及如果所确定的实际仓量和确定的投影箱数量不能满足所确定的所需仓量，则修改多个晶片批次上的多个处理中的至少一个。

    Method and system for implementing virtual metrology in semiconductor fabrication
    5.
    发明授权
    Method and system for implementing virtual metrology in semiconductor fabrication 有权
    在半导体制造中实现虚拟计量的方法和系统

    公开(公告)号：US08396583B2

    公开(公告)日：2013-03-12

    申请号：US12731407

    申请日：2010-03-25

    申请人： Po-Feng Tsai ,  Andy Tsen ,  Jo Fei Wang ,  Jong-I Mou

    发明人： Po-Feng Tsai ,  Andy Tsen ,  Jo Fei Wang ,  Jong-I Mou

    IPC分类号： G06F19/00

    CPC分类号： H01L22/20

    摘要： The present disclosure provides a method of fabricating a semiconductor device. The method includes collecting a plurality of manufacturing data sets from a plurality of semiconductor processes, respectively. The method includes normalizing each of the manufacturing data sets in a manner so that statistical differences among the manufacturing data sets are reduced. The method includes establishing a database that includes the normalized manufacturing data sets. The method includes normalizing the database in a manner so that the manufacturing data sets in the normalized database are statistically compatible with a selected one of the manufacturing data sets. The method includes predicting performance of a selected one of the semiconductor processes by using the normalized database. The selected semiconductor process corresponds to the selected manufacturing data set. The method includes controlling a semiconductor processing machine in response to the predicted performance.

    摘要翻译： 本公开提供了制造半导体器件的方法。 该方法包括分别从多个半导体处理中收集多个制造数据集。 该方法包括以制造数据组之间的统计差异减小的方式标准化每个制造数据组。 该方法包括建立包括标准化制造数据集的数据库。 该方法包括以使得归一化数据库中的制造数据集统统地与选定的一个制造数据集统计地兼容的方式对数据库进行归一化。 该方法包括通过使用归一化数据库来预测所选择的一个半导体处理的性能。 所选择的半导体工艺对应于所选择的制造数据集。 该方法包括响应于预测的性能来控制半导体处理机。

    Advanced process control for new tapeout product
    6.
    发明授权
    Advanced process control for new tapeout product 有权
    新的流片产品的高级过程控制

    公开(公告)号：US08239056B2

    公开(公告)日：2012-08-07

    申请号：US12616681

    申请日：2009-11-11

    申请人： Chih-Wei Hsu ,  Yu-Jen Cheng ,  Wen-Pin Liu ,  Shun-Ping Wang ,  Shin-Rung Lu ,  Jo Fei Wang ,  Jong-I Mou ,  Andy Tsen ,  Chun-Hsien Lin

    发明人： Chih-Wei Hsu ,  Yu-Jen Cheng ,  Wen-Pin Liu ,  Shun-Ping Wang ,  Shin-Rung Lu ,  Jo Fei Wang ,  Jong-I Mou ,  Andy Tsen ,  Chun-Hsien Lin

    IPC分类号： G06F19/00

    CPC分类号： H01L21/67253 ,  G05B19/41865 ,  H01L21/67276 ,  Y02P90/20

    摘要： The present disclosure provides a semiconductor manufacturing method. The method includes providing product data of a product, the product data including a sensitive product parameter; searching existing products according to the sensitive product parameter to identify a relevant product from the existing products; determining an initial value of a processing model parameter to the product using corresponding data of the relevant product; assigning the initial value of the processing model parameter to a processing model associated with a manufacturing process; thereafter, tuning a processing recipe using the processing model; and performing the manufacturing process to a semiconductor wafer using the processing recipe.

    摘要翻译： 本发明提供一种半导体制造方法。 该方法包括提供产品的产品数据，产品数据包括敏感产品参数; 根据敏感产品参数搜索现有产品，从现有产品中识别相关产品; 使用相关产品的相应数据确定产品的处理模型参数的初始值; 将处理模型参数的初始值分配给与制造过程相关联的处理模型; 此后，使用该处理模型调整处理配方; 以及使用所述处理配方对所述半导体晶片进行制造处理。

    METHOD AND SYSTEM FOR IMPLEMENTING VIRTUAL METROLOGY IN SEMICONDUCTOR FABRICATION
    7.
    发明申请
    METHOD AND SYSTEM FOR IMPLEMENTING VIRTUAL METROLOGY IN SEMICONDUCTOR FABRICATION 有权
    在半导体制造中实现虚拟计量的方法和系统

    公开(公告)号：US20110238198A1

    公开(公告)日：2011-09-29

    申请号：US12731407

    申请日：2010-03-25

    申请人： Po-Feng Tsai ,  Andy Tsen ,  Jo Fei Wang ,  Jong-I Mou

    发明人： Po-Feng Tsai ,  Andy Tsen ,  Jo Fei Wang ,  Jong-I Mou

    IPC分类号： G05B13/04 ,  G06F15/18

    CPC分类号： H01L22/20

    摘要： The present disclosure provides a method of fabricating a semiconductor device. The method includes collecting a plurality of manufacturing data sets from a plurality of semiconductor processes, respectively. The method includes normalizing each of the manufacturing data sets in a manner so that statistical differences among the manufacturing data sets are reduced. The method includes establishing a database that includes the normalized manufacturing data sets. The method includes normalizing the database in a manner so that the manufacturing data sets in the normalized database are statistically compatible with a selected one of the manufacturing data sets. The method includes predicting performance of a selected one of the semiconductor processes by using the normalized database. The selected semiconductor process corresponds to the selected manufacturing data set. The method includes controlling a semiconductor processing machine in response to the predicted performance.

    摘要翻译： 本公开提供了制造半导体器件的方法。 该方法包括分别从多个半导体处理中收集多个制造数据集。 该方法包括以制造数据组之间的统计差异减小的方式标准化每个制造数据组。 该方法包括建立包括标准化制造数据集的数据库。 该方法包括以使得归一化数据库中的制造数据集统统地与选定的一个制造数据集统计地兼容的方式对数据库进行归一化。 该方法包括通过使用归一化数据库来预测所选择的一个半导体处理的性能。 所选择的半导体工艺对应于所选择的制造数据集。 该方法包括响应于预测的性能来控制半导体处理机。

    ADVANCED PROCESS CONTROL FOR NEW TAPEOUT PRODUCT
    8.
    发明申请
    ADVANCED PROCESS CONTROL FOR NEW TAPEOUT PRODUCT 有权
    新型贴片产品的先进工艺控制

    公开(公告)号：US20110112678A1

    公开(公告)日：2011-05-12

    申请号：US12616681

    申请日：2009-11-11

    申请人： Chih-Wei Hsu ,  Yu-Jen Cheng ,  Wen-Pin Liu ,  Shun-Ping Wang ,  Shin-Rung Lu ,  Jo Fei Wang ,  Jong-I Mou ,  Andy Tsen ,  Chun-Hsien Lin

    发明人： Chih-Wei Hsu ,  Yu-Jen Cheng ,  Wen-Pin Liu ,  Shun-Ping Wang ,  Shin-Rung Lu ,  Jo Fei Wang ,  Jong-I Mou ,  Andy Tsen ,  Chun-Hsien Lin

    IPC分类号： G06F17/50

    CPC分类号： H01L21/67253 ,  G05B19/41865 ,  H01L21/67276 ,  Y02P90/20

    摘要： The present disclosure provides a semiconductor manufacturing method. The method includes providing product data of a product, the product data including a sensitive product parameter; searching existing products according to the sensitive product parameter to identify a relevant product from the existing products; determining an initial value of a processing model parameter to the product using corresponding data of the relevant product; assigning the initial value of the processing model parameter to a processing model associated with a manufacturing process; thereafter, tuning a processing recipe using the processing model; and performing the manufacturing process to a semiconductor wafer using the processing recipe.

    摘要翻译： 本发明提供一种半导体制造方法。 该方法包括提供产品的产品数据，产品数据包括敏感产品参数; 根据敏感产品参数搜索现有产品，从现有产品中识别相关产品; 使用相关产品的相应数据确定产品的处理模型参数的初始值; 将处理模型参数的初始值分配给与制造过程相关联的处理模型; 此后，使用该处理模型调整处理配方; 以及使用所述处理配方对所述半导体晶片进行制造处理。

    E-CHUCK WITH AUTOMATED CLAMPED FORCE ADJUSTMENT AND CALIBRATION
    9.
    发明申请
    E-CHUCK WITH AUTOMATED CLAMPED FORCE ADJUSTMENT AND CALIBRATION 有权
    具有自动钳位力调整和校准的电动自行车

    公开(公告)号：US20110042006A1

    公开(公告)日：2011-02-24

    申请号：US12938610

    申请日：2010-11-03

    申请人： Jo Fei Wang ,  Sunny Wu ,  Jong-I Mou

    发明人： Jo Fei Wang ,  Sunny Wu ,  Jong-I Mou

    IPC分类号： H01L21/46 ,  G06F19/00 ,  H01L21/465

    CPC分类号： H01L21/6831 ,  H01L22/20 ,  H01L2924/0002 ,  Y10S438/909 ,  H01L2924/00

    摘要： The present disclosure describes a semiconductor manufacturing apparatus. The apparatus includes a processing chamber designed to perform a process to a wafer; an electrostatic chuck (E-chuck) configured in the processing chamber and designed to secure the wafer, wherein the E-chuck includes an electrode and a dielectric feature formed on the electrode; a tuning structure designed to hold the E-chuck to the processing chamber by clamping forces, wherein the tuning structure is operable to dynamically adjust the clamping forces; a sensor integrated with the E-chuck and sensitive to the clamping forces; and a process control module for controlling the tuning structure to adjust the clamping forces based on pre-measurement data from the wafer and sensor data from the sensor.

    摘要翻译： 本公开描述了一种半导体制造装置。 该设备包括设计成对晶片执行处理的处理室; 配置在所述处理室中并设计成固定所述晶片的静电卡盘（E卡盘），其中所述E卡盘包括形成在所述电极上的电极和电介质特征; 调谐结构，其被设计成通过夹紧力将所述E卡盘保持在所述处理室中，其中所述调谐结构可操作以动态地调节所述夹紧力; 与E型卡盘集成并对夹紧力敏感的传感器; 以及过程控制模块，用于基于来自晶片的预测量数据和来自传感器的传感器数据来控制调谐结构以调整夹紧力。

    Physical failure analysis guiding methods
    10.
    发明授权
    Physical failure analysis guiding methods 有权
    物理故障分析指导方法

    公开(公告)号：US08205173B2

    公开(公告)日：2012-06-19

    申请号：US12818003

    申请日：2010-06-17

    申请人： Sunny Wu ,  Yen-Di Tsen ,  Monghsung Chuang ,  Fu-Min Huang ,  Jo Fei Wang ,  Jong-I Mou

    发明人： Sunny Wu ,  Yen-Di Tsen ,  Monghsung Chuang ,  Fu-Min Huang ,  Jo Fei Wang ,  Jong-I Mou

    IPC分类号： G06F17/50 ,  G06F19/00 ,  G06F11/00 ,  G01R31/00

    CPC分类号： G01R31/2894

    摘要： A method includes providing a plurality of failure dies, and performing a chip probing on the plurality of failure dies to generate a data log comprising electrical characteristics of the plurality of failure dies. An automatic net tracing is performed to trace failure candidate nodes in the failure dies. A failure layer analysis is performed on results obtained from the automatic net tracing. Physical failure analysis (PFA) samples are selected from the plurality of failure dies using results obtained in the step of performing the failure layer analysis.

    摘要翻译： 一种方法包括提供多个故障管芯，并对多个故障管芯进行芯片探测以产生包括多个故障管芯的电气特性的数据记录。 执行自动网络跟踪以跟踪故障模块中的故障候选节点。 对从自动网络跟踪获得的结果执行故障层分析。 使用在执行故障层分析的步骤中获得的结果从多个故障模具中选择物理故障分析（PFA）样本。