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公开(公告)号:US10686036B2
公开(公告)日:2020-06-16
申请号:US15587005
申请日:2017-05-04
发明人: Fu-Hsiung Yang , Long-Shih Lin , Kun-Ming Huang , Chih-Heng Shen , Po-Tao Chu
IPC分类号: H01L29/08 , H01L21/02 , H01L21/265 , H01L21/306 , H01L29/66 , H01L29/739 , H01L21/266 , H01L21/324 , H01L29/06
摘要: A method of making a bipolar transistor includes patterning a first photoresist over a collector region of the bipolar transistor, the first photoresist defining a first opening. The method further includes performing a first implantation process through the first opening. The method further includes patterning a second photoresist over the collector region, the second photoresist defining a second opening different from the first opening. The method further includes performing a second implantation process through the second opening, wherein a dopant concentration resulting from the second implantation process is different from a dopant concentration resulting from the first implantation process.
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公开(公告)号:US20140231964A1
公开(公告)日:2014-08-21
申请号:US13770438
申请日:2013-02-19
发明人: Long-Shih Lin , Fu-Hsiung Yang , Kun-Ming Huang , Ming-Yi Lin , Paul Chu
CPC分类号: H01L21/02532 , H01L21/02381 , H01L21/02488 , H01L21/0257 , H01L21/02587 , H01L21/76262 , H01L29/0619 , H01L29/36 , H01L29/66325 , H01L29/7394
摘要: A substrate for an integrated circuit includes a device wafer having a raw carrier concentration and an epitaxial layer disposed over the device wafer. The epitaxial layer has a first carrier concentration. The first carrier concentration is higher than the raw carrier concentration.
摘要翻译: 用于集成电路的衬底包括具有原始载流子浓度的器件晶片和设置在器件晶片上的外延层。 外延层具有第一载流子浓度。 第一载流子浓度高于原载流子浓度。
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公开(公告)号:US09111898B2
公开(公告)日:2015-08-18
申请号:US13770438
申请日:2013-02-19
发明人: Long-Shih Lin , Fu-Hsiung Yang , Kun-Ming Huang , Ming-Yi Lin , Paul Chu
IPC分类号: B32B9/04 , B32B13/04 , H01L21/02 , H01L29/36 , H01L29/66 , H01L29/739 , H01L29/06 , H01L21/762
CPC分类号: H01L21/02532 , H01L21/02381 , H01L21/02488 , H01L21/0257 , H01L21/02587 , H01L21/76262 , H01L29/0619 , H01L29/36 , H01L29/66325 , H01L29/7394
摘要: A substrate for an integrated circuit includes a device wafer having a raw carrier concentration and an epitaxial layer disposed over the device wafer. The epitaxial layer has a first carrier concentration. The first carrier concentration is higher than the raw carrier concentration.
摘要翻译: 用于集成电路的衬底包括具有原始载流子浓度的器件晶片和设置在器件晶片上的外延层。 外延层具有第一载流子浓度。 第一载流子浓度高于原载流子浓度。
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公开(公告)号:US09853121B2
公开(公告)日:2017-12-26
申请号:US14790062
申请日:2015-07-02
发明人: Long-Shih Lin , Kun-Ming Huang , Ming-Yi Lin
IPC分类号: H01L29/66 , H01L29/06 , H01L29/08 , H01L29/10 , H01L21/8222 , H01L29/78 , H01L29/739 , H01L29/423
CPC分类号: H01L29/66325 , H01L21/8222 , H01L29/0634 , H01L29/0696 , H01L29/0808 , H01L29/0847 , H01L29/1095 , H01L29/42368 , H01L29/66659 , H01L29/66681 , H01L29/66931 , H01L29/7393 , H01L29/7394 , H01L29/7816 , H01L29/7824 , H01L29/7835
摘要: A method of fabricating a transistor includes doping non-overlapping first, second, and third wells in a silicon layer of a substrate. The substrate, second and third wells have a first type of conductivity and the first well and silicon layer have a second type of conductivity. First and second insulating layers are thermally grown over the second well between the first well and the third well, and over the third well, respectively. A gate stack is formed over the first insulating layer and the third well. A first source region having the second type of conductivity is formed in the third well. A gate spacer is formed, a fourth well having the first type of conductivity is doped in the third well between the second insulating layer and the gate spacer, a second source region is formed over the fourth well, and a drain is formed in the first well.
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公开(公告)号:US09647065B2
公开(公告)日:2017-05-09
申请号:US14056393
申请日:2013-10-17
发明人: Fu-Hsiung Yang , Long-Shih Lin , Kun-Ming Huang , Chih-Heng Shen , Po-Tao Chu
IPC分类号: H01L29/08 , H01L29/739 , H01L29/66
CPC分类号: H01L29/0821 , H01L21/02236 , H01L21/26513 , H01L21/266 , H01L21/30604 , H01L21/324 , H01L29/0649 , H01L29/0692 , H01L29/0804 , H01L29/0834 , H01L29/6625 , H01L29/66325 , H01L29/7393
摘要: A bipolar transistor includes a substrate and a first well in the substrate, the first well having a first dopant type. The bipolar transistor further includes a split collector region in the first well. The split collector region includes a highly doped central region having a second dopant type opposite the first dopant type; and a lightly doped peripheral region having the second dopant type, the lightly doped peripheral region surrounding the highly doped central region. A dopant concentration of the lightly doped peripheral region is less than a dopant concentration of the highly doped central region.
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公开(公告)号:US11233121B2
公开(公告)日:2022-01-25
申请号:US16901729
申请日:2020-06-15
发明人: Fu-Hsiung Yang , Long-Shih Lin , Kun-Ming Huang , Chih-Heng Shen , Po-Tao Chu
IPC分类号: H01L29/08 , H01L29/739 , H01L29/66 , H01L21/02 , H01L21/265 , H01L21/266 , H01L21/306 , H01L21/324 , H01L29/06
摘要: A bipolar transistor includes a substrate having a first well with a first dopant type; and a split collector region in the substrate, the split collector region including a highly doped central region having the first dopant type, and a lightly doped peripheral region having a second dopant type, opposite the first dopant type, wherein the lightly doped peripheral region surrounds the highly doped central region, a dopant concentration of the lightly doped peripheral region ranges from about 5×1012 ions/cm3 to about 5×1013 ions/cm3, and the lightly doped peripheral region has a same maximum depth as the highly doped central region.
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公开(公告)号:US10002761B2
公开(公告)日:2018-06-19
申请号:US14792111
申请日:2015-07-06
发明人: Long-Shih Lin , Fu-Hsiung Yang , Kun-Ming Huang , Ming-Yi Lin , Po-Tao Chu
IPC分类号: C30B25/20 , H01L21/02 , H01L29/36 , H01L29/66 , H01L29/739 , H01L29/06 , H01L21/762
CPC分类号: H01L21/02532 , H01L21/02381 , H01L21/02488 , H01L21/0257 , H01L21/02587 , H01L21/76262 , H01L29/0619 , H01L29/36 , H01L29/66325 , H01L29/7394
摘要: A substrate for an integrated circuit includes a device wafer having a raw carrier concentration and an epitaxial layer disposed over the device wafer. The epitaxial layer has a first carrier concentration. The first carrier concentration is higher than the raw carrier concentration.
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公开(公告)号:US20150311070A1
公开(公告)日:2015-10-29
申请号:US14792111
申请日:2015-07-06
发明人: Long-Shih Lin , Fu-Hsiung Yang , Kun-Ming Huang , Ming-Yi Lin , Po-Tao Chu
IPC分类号: H01L21/02
CPC分类号: H01L21/02532 , H01L21/02381 , H01L21/02488 , H01L21/0257 , H01L21/02587 , H01L21/76262 , H01L29/0619 , H01L29/36 , H01L29/66325 , H01L29/7394
摘要: A substrate for an integrated circuit includes a device wafer having a raw carrier concentration and an epitaxial layer disposed over the device wafer. The epitaxial layer has a first carrier concentration. The first carrier concentration is higher than the raw carrier concentration.
摘要翻译: 用于集成电路的衬底包括具有原始载流子浓度的器件晶片和设置在器件晶片上的外延层。 外延层具有第一载流子浓度。 第一载流子浓度高于原载流子浓度。
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