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公开(公告)号:US20200072664A1
公开(公告)日:2020-03-05
申请号:US16550371
申请日:2019-08-26
Applicant: TDK CORPORATION
Inventor: Naoki OHTA , Yuji KAKINUMA , Shinji HARA , Susumu AOKI , Keita KAWAMORI , Eiji KOMURA
Abstract: A resistive element array circuit includes word lines, bit lines, resistive elements, a selector, a differential amplifier, and a ground terminal. The word lines are coupled to a power supply. The resistive elements are each disposed at an intersection of corresponding one of the word lines and corresponding one of the bit lines. The selector is configured to select one word line and one bit line. The differential amplifier includes a positive input terminal configured to be coupled to the selected one of the bit lines which is selected by the selector, a negative input terminal configured to be coupled to non-selected one of the bit lines which is not selected by the selector and to non-selected one of the word lines which is not selected by the selector, an output terminal being coupled to the negative input terminal. The ground terminal is coupled to the positive input terminal.
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公开(公告)号:US20190051815A1
公开(公告)日:2019-02-14
申请号:US16058237
申请日:2018-08-08
Applicant: TDK CORPORATION
Inventor: Yuji KAKINUMA , Atsushi TSUMITA
Abstract: Provided is a magnetic memory including: a first bit line, a second bit line, and a third bit line; a word line; a first magnetoresistance effect element; a first transistor; a second magnetoresistance effect element; and a second transistor, wherein free layers of the first and second magnetoresistance effect elements and the second bit line are connected, a fixed layer of the first magnetoresistance effect element and a source terminal of the first transistor are connected, a drain terminal of the first transistor and the first bit line are connected, a fixed layer of the second magnetoresistance effect element and a drain terminal of the second transistor are connected, a source terminal of the second transistor and the third bit line are connected, and the word line is connected to each of a gate terminal of the first transistor and a gate terminal of the second transistor.
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公开(公告)号:US20130222092A1
公开(公告)日:2013-08-29
申请号:US13779048
申请日:2013-02-27
Applicant: TDK CORPORATION
Inventor: Katsuyuki NAKADA , Takahiro SUWA , Kuniyasu ITO , Yuji KAKINUMA , Masato TAKAHASHI
IPC: H01F1/00
CPC classification number: H01F1/0036 , G01R33/091 , G01R33/093 , G11B5/3903 , G11C11/16 , G11C11/161 , H01F10/3268 , H01F10/3286 , H01F10/3295 , Y10T428/1107 , Y10T428/1121
Abstract: A thin-film magnetic oscillation element includes a pinned magnetic layer, a free magnetic layer, a nonmagnetic spacer layer provided between the pinned magnetic layer and the free magnetic layer, and a pair of electrodes, in which the easy axis of magnetization of the pinned magnetic layer lies in an in-plane direction of the plane of the pinned magnetic layer, and the easy axis of magnetization of the free magnetic layer lies in a direction normal to the plane of the free magnetic layer. Preferably, the relationship between the saturation magnetization Ms and the magnetic anisotropy field Ha of the free magnetic layer satisfies 1.257 Ms
Abstract translation: 薄膜磁振动元件包括钉扎磁性层,自由磁性层,设置在钉扎磁性层和自由磁性层之间的非磁性间隔层,以及一对电极,其中固定的易磁化轴 磁性层位于被钉扎的磁性层的平面的面内方向,自由磁性层的易磁化轴位于与自由磁性层的平面垂直的方向上。 优选地,自由磁性层的饱和磁化强度Ms和磁各向异性场Ha之间的关系满足1.257 Ms
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公开(公告)号:US20240396545A1
公开(公告)日:2024-11-28
申请号:US18572341
申请日:2021-06-21
Applicant: TDK CORPORATION
Inventor: Yuji KAKINUMA , Tatsuo SHIBATA
IPC: H03K17/56
Abstract: A drive circuit including: a load resistor; a variable resistance element configured to have at least a first terminal and a second terminal and be capable of changing a resistance value; and a constant current source configured to determine a magnitude of a current flowing through the load resistor based on an input voltage and a resistance value of the variable resistance element, in which a voltage across the load resistor is output as an output voltage.
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公开(公告)号:US20220037587A1
公开(公告)日:2022-02-03
申请号:US17358872
申请日:2021-06-25
Applicant: TDK CORPORATION
Inventor: Yuji KAKINUMA
Abstract: A non-volatile associative memory cell includes: one magnetoresistance effect element including first and second ferromagnetic layers and a non-magnetic layer; first and second match lines connected to the magnetoresistance effect element in accordance with predetermined first and second search line voltages. The magnetoresistance effect element includes: first and second members. The first member includes first and second electrodes disposed at opposite ends. The first ferromagnetic layer is in the first or second member, the non-magnetic layer is stacked in the first direction, and the direction of internal magnetization of the first ferromagnetic layer changes in a case in which a current flows between the first and second electrodes. The non-magnetic and the second ferromagnetic layers are in the second member. A magnetoresistance effect element resistance value changes. An electric potential corresponding to an second ferromagnetic layer electric potential is applied to each of the first and second match lines.
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公开(公告)号:US20170026207A1
公开(公告)日:2017-01-26
申请号:US15215380
申请日:2016-07-20
Applicant: TDK CORPORATION
Inventor: Yuji KAKINUMA
Abstract: A microwave receiver includes a magnetoresistive element to which a microwave is input, a magnetic field application unit, and a DC bias current application unit. The magnetoresistive element includes a free magnetic layer, a fixed magnetic layer, and a nonmagnetic spacer layer interposed between the free magnetic layer and the fixed magnetic layer. The magnetic field application unit applies a magnetic field to the free magnetic layer. The DC bias current application unit applies a DC bias current to the magnetoresistive element, and includes an input terminal. The DC bias current is made variable by adjusting a DC voltage that is applied to the DC bias current application unit via the input terminal.
Abstract translation: 微波接收机包括输入微波的磁阻元件,磁场施加单元和直流偏置电流施加单元。 磁阻元件包括自由磁性层,固定磁性层和介于自由磁性层和固定磁性层之间的非磁性间隔层。 磁场施加单元向自由磁性层施加磁场。 直流偏置电流施加单元向磁阻元件施加直流偏置电流,并且包括输入端子。 通过调节通过输入端施加到直流偏置电流施加单元的直流电压,使直流偏置电流可变。
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