Dual-mode error-correction code/write-once memory codec

    公开(公告)号:US10592333B2

    公开(公告)日:2020-03-17

    申请号:US15633835

    申请日:2017-06-27

    Abstract: A system for error correction code (ECC) management of write-once memory (WOM) codes includes, for example, a controller for selecting between one of a WOM (Write-Once Memory) mode and an ECC (error correction code) mode. A codec is arranged to operate in the selected mode. The codec while operating in the ECC mode is arranged to identify a bit position of at least one bit error in response to ECC parity bits of a first received data word. The codec while operating in the WOM mode is arranged to receive a WOM-encoded word from an addressed location in a WOM device, to receive a second received data word to be encoded and written to the addressed location, and to generate WOM-encoded word for writing to the addressed location in the WOM device. The WOM-encoded word for writing to the addressed location is optionally ECC encoded.

    Dual mode memory array security apparatus, systems and methods

    公开(公告)号:US10068631B2

    公开(公告)日:2018-09-04

    申请号:US14794560

    申请日:2015-07-08

    Abstract: Read-only (“RO”) data consisting of a physically unclonable function (“PUF”) pattern is written to a ferroelectric random-access memory (“FRAM”) memory array. The FRAM array is baked to imprint the PUF pattern with a selected average depth of imprint and a corresponding average read reliability. The average depth of imprint and corresponding average read reliability are determined during testing after baking. The PUF pattern as read after baking is compared to the PUF pattern as written prior to baking. Additional PUF pattern writing and baking cycles may be performed until the average depth of imprint and associated read reliability reach a first selected level. Integrated circuits determined to be over-imprinted by exceeding a second selected level may be rejected. The first and second levels of PUF pattern imprint are selected such as to produce FRAM arrays with a unique fingerprint for each individual FRAM array-containing integrated circuit.

    SEMICONDUCTOR MEMORY CELL MULTI-WRITE AVOIDANCE ENCODING APPARATUS, SYSTEMS AND METHODS
    6.
    发明申请
    SEMICONDUCTOR MEMORY CELL MULTI-WRITE AVOIDANCE ENCODING APPARATUS, SYSTEMS AND METHODS 有权
    半导体存储器单元多写避免编码设备,系统和方法

    公开(公告)号:US20170047130A1

    公开(公告)日:2017-02-16

    申请号:US14824935

    申请日:2015-08-12

    Abstract: Data words to be written to a memory location are delta encoded in multi-write avoidance (“MWA”) code words. MWA code words result in no re-writing of single-bit storage cells containing logical “0's” to a “0” state and no re-writing of logical “1's” to cells that have already been written once to a logical “1.” Potential MWA code words stored in a look-up table (“LUT”) are indexed by a difference word DELTA_D. DELTA_D represents a bitwise difference (“delta”) between a data word currently stored at the memory location and a new data word (“NEW_D”) to be stored at the memory location. Validation and selection logic chooses an MWA code word representing NEW_D to be written if the MWA code word does not violate the principle of multi-write avoidance. Some embodiments generate the MWA code words using a pattern generator rather than indexing the MWA code words from a LUT.

    Abstract translation: 要写入存储器位置的数据字以多写避免(“MWA”)码字进行增量编码。 MWA码字不会将包含逻辑“0”的单位存储单元重新写入“0”状态,并且不将逻辑“1”重新写入已经写入逻辑“1”的单元。 “存储在查找表(”LUT“)中的潜在MWA代码字由差分字DELTA_D索引。 DELTA_D表示当前存储在存储器位置的数据字和要存储在存储器位置的新数据字(“NEW_D”)之间的按位差(“delta”)。 如果MWA代码字不违反多写回避原则,验证和选择逻辑将选择代表NEW_D的MWA代码字来写入。 一些实施例使用模式生成器生成MWA码字,而不是从LUT索引MWA码字。

    WOM CODE EMULATION OF EEPROM-TYPE DEVICES
    7.
    发明申请
    WOM CODE EMULATION OF EEPROM-TYPE DEVICES 有权
    EEPROM类型器件的代码仿真

    公开(公告)号:US20170046090A1

    公开(公告)日:2017-02-16

    申请号:US14826183

    申请日:2015-08-13

    Abstract: A system for write-once memory (WOM) code emulation of EEPROM-type devices includes, for example, a host processor for sending data words for storing in a WOM (Write-Only Memory) device. A host interface receives the data words for encoding by a WOM controller. An emulator programs the WOM-encoded data and an address identifier as an entry of the WOM device. The emulator overwrites previously programmed WOM-encoded data by searching entries of a current active page of a WOM device to locate a programmed WOM entry that includes the searched-for address identifier and the previously written WOM-encoded data word. When the previously written WOM-encoded word cannot be correctly overwritten, the contents of the second WOM-encoded word are stored in a new entry. When the current active page is substantially full, the new entry is stored a new page and the current active page is block-erased.

    Abstract translation: 用于EEPROM型设备的一次写入存储器(WOM)代码仿真的系统包括例如用于发送存储在WOM(只写存储器)设备中的数据字的主机处理器。 主机接口由WOM控制器接收用于编码的数据字。 模拟器将WOM编码数据和地址标识符编程为WOM设备的条目。 仿真器通过搜索WOM设备的当前活动页面的条目来覆盖先前编程的WOM编码数据,以定位包括搜索到的地址标识符和先前写入的WOM编码数据字的编程的WOM条目。 当先前写入的WOM编码字不能被正确覆盖时,第二WOM编码字的内容被存储在一个新条目中。 当当前活动页面基本上已满时,新条目被存储在新页面中,并且当前活动页面被块擦除。

    DUAL MODE MEMORY ARRAY SECURITY APPARATUS, SYSTEMS AND METHODS
    8.
    发明申请
    DUAL MODE MEMORY ARRAY SECURITY APPARATUS, SYSTEMS AND METHODS 审中-公开
    双模式存储器阵列安全设备,系统和方法

    公开(公告)号:US20170011790A1

    公开(公告)日:2017-01-12

    申请号:US14794560

    申请日:2015-07-08

    Abstract: Read-only (“RO”) data consisting of a physically unclonable function (“PUF”) pattern is written to a ferroelectric random-access memory (“FRAM”) memory array. The FRAM array is baked to imprint the PUF pattern with a selected average depth of imprint and a corresponding average read reliability. The average depth of imprint and corresponding average read reliability are determined during testing after baking The PUF pattern as read after baking is compared to the PUF pattern as written prior to baking Additional PUF pattern writing and baking cycles may be performed until the average depth of imprint and associated read reliability reach a first selected level. Integrated circuits determined to be over-imprinted by exceeding a second selected level may be rejected. The first and second levels of PUF pattern imprint are selected such as to produce FRAM arrays with a unique fingerprint for each individual FRAM array-containing integrated circuit.

    Abstract translation: 包含物理不可克隆功能(“PUF”)模式的只读(“RO”)数据被写入铁电随机存取存储器(“FRAM”)存储器阵列。 烘烤FRAM阵列以打印具有所选择的平均印刷深度和相应的平均读取可靠性的PUF图案。 在烘烤后的测试期间确定平均印痕深度和相应的平均读取可靠性将烘烤后读取的PUF图案与烘烤前书写的PUF图案进行比较可以进行其它PUF图案书写和烘烤循环,直到平均印痕深度 并且相关的读取可靠性达到第一选定的级别。 被确定为超过第二选定电平的印刷电路的集成电路可能被拒绝。 选择第一和第二级PUF图案印记,以便为每个含有FRAM阵列的集成电路产生具有唯一指纹的FRAM阵列。

    METHODS AND APPARATUS TO CREATE A PHYSICALLY UNCLONABLE FUNCTION

    公开(公告)号:US20210109579A1

    公开(公告)日:2021-04-15

    申请号:US17130076

    申请日:2020-12-22

    Abstract: Methods and apparatus for creating a physically unclonable function for SRAM are disclosed. An example method includes decreasing a supply voltage of a memory array to a first voltage level, the first voltage level being below a normal operating voltage associated with the memory array, reading a first value of a bit cell after the supply voltage has been at the first voltage level, and determining a function based on the first value of the bit cell and a second value, the second value stored in the bit cell when the memory array is operating at a voltage level above the first voltage level, the function to represent an identification of a circuit including the memory array.

    Error correction code management of write-once memory codes

    公开(公告)号:US10191801B2

    公开(公告)日:2019-01-29

    申请号:US15678315

    申请日:2017-08-16

    Abstract: Disclosed embodiments include an electronic device having a write-once memory (WOM) and a memory controller. The memory controller includes a host interface receiving a data word including first and second symbols, each having at least two bits, a WOM controller that encodes the first and second symbols and outputs a WOM-encoded word including first and second WOM codes corresponding to the first and second symbols, respectively, an error correction code (ECC) controller that encodes the WOM-encoded word and outputs an ECC-encoded word including the first and second WOM codes and a first set of ECC bits corresponding to a first write operation, and a memory device interface that writes the ECC-encoded word the WOM device in the first write operation. Each of the first and second WOM codes include at least three bits with at least two of the at least three bits having the same logic value.

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