公开(公告)号：US20210175165A1

公开(公告)日：2021-06-10

申请号：US16827455

申请日：2020-03-23

Applicant: TEXAS INSTRUMENTS INCORPORATED

Inventor： MAKOTO SHIBUYA ,  KENGO AOYA ,  WOOCHAN KIM ,  VIVEK KISHORECHAND ARORA

IPC: H01L23/498 ,  H01L23/64 ,  H01L49/02 ,  H01L23/00 ,  H01L21/8234 ,  H01L21/48

Abstract: An integrated circuit (IC) package includes a substrate having a first region and a second region. The substrate includes a conductive path between the first region and the second region. The IC package also includes a lead frame having a first member and a second member that are spaced apart. The IC package further includes a half-bridge power module. The half-bridge power module includes a capacitor having a first node coupled to the first member of the lead frame and a second node coupled to the second member of the lead frame. The half-bridge power module also includes a high side die having a high side field effect transistor (FET) embedded therein and a low side die having a low side FET embedded therein. A source of the high side FET is coupled to a drain of the low side FET through the conductive path of the substrate.

公开(公告)号：US20190013288A1

公开(公告)日：2019-01-10

申请号：US16028741

申请日：2018-07-06

Applicant: TEXAS INSTRUMENTS INCORPORATED

Inventor： WOOCHAN KIM ,  MASAMITSU MATSUURA ,  MUTSUMI MASUMOTO ,  KENGO AOYA ,  HAU THANH NGUYEN ,  VIVEK KISHORECHAND ARORA ,  ANINDYA PODDAR

IPC: H01L23/00 ,  H01L23/522 ,  H01L25/065 ,  H01L23/532 ,  H01L21/56 ,  H01L23/31 ,  H01L25/00 ,  H01L23/29 ,  H01L23/528

Abstract: An embedded die package includes a first die having an operating voltage between a first voltage potential and a second voltage potential that is less than the first voltage potential. A via, including a conductive material, is electrically connected to a bond pad on a surface of the first die, the via including at least one extension perpendicular to a plane along a length of the via. A redistribution layer (RDL) is electrically connected to the via, at an angle with respect to the via defining a space between the surface and a surface of the RDL. A build-up material is in the space.

公开(公告)号：US20230047555A1

公开(公告)日：2023-02-16

申请号：US17400913

申请日：2021-08-12

Applicant: TEXAS INSTRUMENTS INCORPORATED

Inventor： KEN PHAM, JR. ,  VIVEK ARORA ,  WOOCHAN KIM

IPC: H01L23/495 ,  H01L23/31 ,  H01L23/00 ,  H01L21/48 ,  H01L21/56

Abstract: This description relates generally to semiconductor devices and processes. A method for forming a packaged semiconductor package can include attaching a front side of a metal layer to a die pad of a leadframe that includes conductive terminals, so a periphery portion of the metal layer extends beyond a periphery pad surface of the die pad, and a portion of a half-etched cavity on the front side of the metal layer is located near the periphery pad surface of the die pad. The method further includes attaching a semiconductor device to the die pad and encapsulating the semiconductor device, the front side of the metal layer, a portion of a back side of the metal layer, and a portion of the conductive terminals to form a packaged semiconductor device.

公开(公告)号：US20240258245A1

公开(公告)日：2024-08-01

申请号：US18159966

申请日：2023-01-26

Applicant: TEXAS INSTRUMENTS INCORPORATED

Inventor： KWANG-SOO KIM ,  WOOCHAN KIM ,  VIVEK KISHORECHAND ARORA

IPC: H01L23/552 ,  H01L21/56 ,  H01L23/00 ,  H01L23/31 ,  H01L23/495 ,  H01L23/498

CPC classification number: H01L23/552 ,  H01L21/56 ,  H01L23/3107 ,  H01L23/49555 ,  H01L23/49822 ,  H01L23/49827 ,  H01L24/32 ,  H01L24/48 ,  H01L24/73 ,  H01L24/92 ,  H01L2224/32225 ,  H01L2224/48141 ,  H01L2224/48245 ,  H01L2224/73265 ,  H01L2224/92247

Abstract: An electronic device that includes a substrate and a die disposed on the substrate, the die having an active surface. Wire bonds are attached from the active surface of the die to the substrate. A radiation barrier is attached to the substrate and disposed over the die. The radiation barrier is configured to mitigate electromagnetic radiation exposure to the die. A mold compound is formed over the die, the wire bonds, and the radiation barrier.

公开(公告)号：US20230386963A1

公开(公告)日：2023-11-30

申请号：US17828803

申请日：2022-05-31

Applicant: TEXAS INSTRUMENTS INCORPORATED

Inventor： WOOCHAN KIM ,  Vivek Kishorechand Arora ,  Ninad Shahane ,  Makoto Shibuya

IPC: H01L23/373 ,  H01L23/66 ,  H01L23/12 ,  H01L23/498 ,  H02M3/155 ,  H01L25/18 ,  H01L23/00

CPC classification number: H01L23/3735 ,  H01L23/66 ,  H01L23/12 ,  H01L23/49811 ,  H02M3/155 ,  H01L25/18 ,  H01L24/48 ,  H01L2924/1033 ,  H01L2224/05567

Abstract: A power converter module includes a substrate having a first surface and a second surface that opposes the first surface. The power converter module includes a thick printed copper (TPC) substrate on the first surface of the substrate. The TPC substrate includes a first layer having TPC patterned on the first surface of the substrate and a second layer with dielectric patterned on the first layer. The TPC substrate includes a third layer having TPC patterned on the second layer. The power converter module includes power transistors mounted on the TPC substrate and a control integrated circuit (IC) chip mounted on the TPC substrate.