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公开(公告)号：US12051657B2
公开(公告)日：2024-07-30
申请号：US17474103
申请日：2021-09-14
Applicant: Texas Instruments Incorporated
Inventor： Raul Ble{hacek over (c)}ić , Nicola Bertoni , Zhemin Zhang
IPC: H01L23/64 , H01F27/36 , H01L21/48 , H01L23/498 , H01L23/552 , H01L49/02 , H01F19/00
CPC classification number: H01L23/645 , H01F27/363 , H01L21/4857 , H01L23/49822 , H01L23/552 , H01L28/10 , H01F19/00
Abstract: An electronic device includes a multilevel lamination structure having a core layer, dielectric layers and conductive features formed in metal layers on or between respective ones or pairs of the dielectric layers. The core layer and the dielectric layers extend in respective planes of orthogonal first and second directions and are stacked along an orthogonal third direction. The conductive features include a first patterned conductive feature having multiple conductive turns in each of a first pair of the metal layers to form a first winding having a first turn and a final turn adjacent to one another in the same metal layer of the first pair, and a second patterned conductive feature having multiple conductive turns in a second pair of the metal layers to form a second winding having a first turn and a final turn.
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公开(公告)号：US20220415829A1
公开(公告)日：2022-12-29
申请号：US17474103
申请日：2021-09-14
Applicant: Texas Instruments Incorporated
Inventor： Raul Blecic , Nicola Bertoni , Zhemin Zhang
IPC: H01L23/64 , H01L23/498 , H01L23/552 , H01L21/48 , H01L49/02 , H01F27/36
Abstract: An electronic device includes a multilevel lamination structure having a core layer, dielectric layers and conductive features formed in metal layers on or between respective ones or pairs of the dielectric layers. The core layer and the dielectric layers extend in respective planes of orthogonal first and second directions and are stacked along an orthogonal third direction. The conductive features include a first patterned conductive feature having multiple conductive turns in each of a first pair of the metal layers to form a first winding having a first turn and a final turn adjacent to one another in the same metal layer of the first pair, and a second patterned conductive feature having multiple conductive turns in a second pair of the metal layers to form a second winding having a first turn and a final turn.
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公开(公告)号：US20210375540A1
公开(公告)日：2021-12-02
申请号：US17240656
申请日：2021-04-26
Applicant: TEXAS INSTRUMENTS INCORPORATED
Inventor： Yuki Sato , Kenji Otake , Zhemin Zhang , Byron Lovell Williams , Dongbin Hou , Sombuddha Chakraborty
Abstract: A laminate embedded core and coil structure comprises a magnetic core embedded in a laminate structure that includes two types of laminates. A first laminate embeds the coils of the structure and a second laminate fills space between the magnetic core and the first laminate, as well as space below the magnetic core and lower surface of the first laminate. The first and second laminates form a laminate structure that protects and improves isolation of the magnetic components. Solder resist encloses the laminate structure, magnetic core and coils. The laminate embedded core and coil structure may be assembled on a transformer leadframe of various types using non-conductive paste.
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公开(公告)号：US20240371800A1
公开(公告)日：2024-11-07
申请号：US18773348
申请日：2024-07-15
Applicant: Texas Instruments Incorporated
Inventor： Raul Blecic , Nicola Bertoni , Zhemin Zhang
IPC: H01L23/64 , H01F19/00 , H01F27/36 , H01L21/48 , H01L23/498 , H01L23/552
Abstract: An electronic device includes a multilevel lamination structure having a core layer, dielectric layers and conductive features formed in metal layers on or between respective ones or pairs of the dielectric layers. The core layer and the dielectric layers extend in respective planes of orthogonal first and second directions and are stacked along an orthogonal third direction. The conductive features include a first patterned conductive feature having multiple conductive turns in each of a first pair of the metal layers to form a first winding having a first turn and a final turn adjacent to one another in the same metal layer of the first pair, and a second patterned conductive feature having multiple conductive turns in a second pair of the metal layers to form a second winding having a first turn and a final turn.
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公开(公告)号：US11869855B2
公开(公告)日：2024-01-09
申请号：US17953162
申请日：2022-09-26
Applicant: TEXAS INSTRUMENTS INCORPORATED
Inventor： Zhemin Zhang , Kenji Otake , Yi Yan , Jeffrey Morroni , Yuki Sato , Takafumi Ando
IPC: H01L23/64 , H01F27/28 , H01F41/06 , H01F41/02 , H01F17/04 , H01L21/48 , H01L23/31 , H01L23/495 , H01L49/02 , H01F27/02
CPC classification number: H01L23/645 , H01F17/04 , H01F27/022 , H01F27/28 , H01F41/0206 , H01F41/06 , H01L21/4842 , H01L23/3114 , H01L23/4952 , H01L23/49503 , H01L28/10
Abstract: In examples, a method of manufacturing a transformer device comprises providing a first magnetic member and providing a laminate member containing primary and secondary transformer windings wound around an orifice extending through the laminate member. The method further comprises positioning a build up film abutting the laminate member. The method also comprises positioning at least a portion of a second magnetic member in the orifice. The method further comprises heat pressing at least one of the first and second magnetic members such that a distance between the first and second magnetic members decreases and such that the build-up film melts, thereby producing a transformer device.
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Patent Agency Ranking
公开(公告)号：US20230005652A1
公开(公告)日：2023-01-05
申请号：US17363115
申请日：2021-06-30
Applicant: Texas Instruments Incorporated
Inventor： Dongbin Hou , Zhemin Zhang
Abstract: An apparatus has a laminate substrate that has a first surface and an opposite second surface. A laminate transformer is located within the laminate substrate between the first surface and the second surface. The transformer has a first coil adjacent the first surface and a second coil adjacent the second surface. A magnetic core element on the first surface overlaps a portion of the first coil. A lead frame on the first surface is spaced apart from the magnetic core element. A portion of the lead frame overlaps a portion of the first coil to provide a thermal conductive path.
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公开(公告)号：US11488914B2
公开(公告)日：2022-11-01
申请号：US16581033
申请日：2019-09-24
Applicant: TEXAS INSTRUMENTS INCORPORATED
Inventor： Zhemin Zhang , Kenji Otake , Yi Yan , Jeffrey Morroni , Yuki Sato , Takafumi Ando
IPC: H01L23/64 , H01F41/06 , H01F41/02 , H01F17/04 , H01F27/28 , H01L21/48 , H01L23/31 , H01L23/495 , H01L49/02 , H01F27/02
Abstract: In examples, a method of manufacturing a transformer device comprises providing a first magnetic member and providing a laminate member containing primary and secondary transformer windings wound around an orifice extending through the laminate member. The method further comprises positioning a build up film abutting the laminate member. The method also comprises positioning at least a portion of a second magnetic member in the orifice. The method further comprises heat pressing at least one of the first and second magnetic members such that a distance between the first and second magnetic members decreases and such that the build-up film melts, thereby producing a transformer device.
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公开(公告)号：US11967566B2
公开(公告)日：2024-04-23
申请号：US18086610
申请日：2022-12-21
Applicant: Texas Instruments Incorporated
Inventor： Vijaylaxmi Gumaste Khanolkar , Robert Martinez , Zhemin Zhang , Yongbin Chu
IPC: H01L23/552 , H01F27/28 , H01L21/56 , H01L23/495 , H01L25/00
CPC classification number: H01L23/552 , H01F27/2804 , H01L21/56 , H01L23/49575 , H01L25/50 , H01F2027/2809
Abstract: A packaged electronic device includes first conductive leads and second conductive leads at least partially exposed to an exterior of a package structure, and a multilevel lamination structure in the package structure. The multilevel lamination structure includes a first patterned conductive feature having multiple turns in a first level to form a first winding coupled to at least one of the first conductive leads in a first circuit, a second patterned conductive feature having multiple turns in a different level to form a second winding coupled to at least one of the second conductive leads in a second circuit isolated from the first circuit, and a conductive shield trace having multiple turns in a second level spaced apart from and between the first patterned conductive feature and the second patterned conductive feature, the conductive shield trace coupled in the first circuit.
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公开(公告)号：US11756718B2
公开(公告)日：2023-09-12
申请号：US16236571
申请日：2018-12-30
Applicant: TEXAS INSTRUMENTS INCORPORATED
Inventor： Zhemin Zhang , Roberto Giampiero Massolini , Joyce Marie Mullenix
CPC classification number: H01F19/08 , H01F17/0013 , H01F2017/0066 , H01F2017/0086 , H01F2019/085 , H01L25/16
Abstract: A transformer respectively includes a first isolation barrier, a first inductive element, a second isolation barrier, and a second inductive element. The first isolation barrier and second isolation barrier each comprise multiple isolation layers. The transformer also includes magnetic material including a top magnetic portion disposed above the first isolation barrier. The transformer also includes a bottom magnetic portion disposed below the second inductive element; The transformer further includes an intermediary magnetic portion extending from the top magnetic portion to the bottom magnetic portion via a through-hole within the first isolation barrier, first inductive element, second isolation barrier, and second inductive element. The transformer yet further includes at least one lateral magnetic portion extending from the top magnetic portion to the bottom magnetic portion. The at least one lateral magnetic portion is disposed laterally from the first isolation barrier, first inductive element, second isolation barrier, and second inductive element.
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公开(公告)号：US20230207483A1
公开(公告)日：2023-06-29
申请号：US18086610
申请日：2022-12-21
Applicant: Texas Instruments Incorporated
Inventor： Vijaylaxmi Gumaste Khanolkar , Robert Martinez , Zhemin Zhang , Yongbin Chu
IPC: H01L23/552 , H01L23/495 , H01L21/56 , H01F27/28 , H01L25/00
CPC classification number: H01L23/552 , H01F27/2804 , H01L21/56 , H01L23/49575 , H01L25/50 , H01F2027/2809
Abstract: A packaged electronic device includes first conductive leads and second conductive leads at least partially exposed to an exterior of a package structure, and a multilevel lamination structure in the package structure. The multilevel lamination structure includes a first patterned conductive feature having multiple turns in a first level to form a first winding coupled to at least one of the first conductive leads in a first circuit, a second patterned conductive feature having multiple turns in a different level to form a second winding coupled to at least one of the second conductive leads in a second circuit isolated from the first circuit, and a conductive shield trace having multiple turns in a second level spaced apart from and between the first patterned conductive feature and the second patterned conductive feature, the conductive shield trace coupled in the first circuit.
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