公开(公告)号：US10163699B2

公开(公告)日：2018-12-25

申请号：US15553608

申请日：2016-01-07

Applicant: Tokyo Electron Limited

Inventor： Hiroyuki Nagai ,  Peng Chang ,  Kenji Matsumoto

IPC: H01L21/768 ,  H01L21/28 ,  H01L21/3205 ,  C23C14/34 ,  C23C14/58 ,  C23C16/06 ,  C23C16/56 ,  H01L23/528 ,  C23C14/02 ,  C23C14/04 ,  C23C14/16 ,  C23C16/04 ,  H01L23/532

Abstract: A method of forming, on a substrate having on a surface thereof a film having a trench of a preset pattern and a via at a bottom of the trench, a Cu wiring by burying Cu or Cu alloy in the trench and the via includes forming a barrier film (process 2); forming, on a surface of the barrier film, a wetting target layer of Ru or the like (process 3); forming, on a surface of the wetting target layer, a Cu-based seed film by PVD (process 4); filling the via by heating the substrate and flowing the Cu-based seed film into the via (process 5); and forming, on the substrate surface, a Cu-based film made of the Cu or Cu alloy by PVD under a condition where the Cu-based film is flown on the wetting target layer to bury the Cu-based film in the trench (process 6).

公开(公告)号：US09362166B2

公开(公告)日：2016-06-07

申请号：US14642331

申请日：2015-03-09

Applicant: TOKYO ELECTRON LIMITED

Inventor： Tadahiro Ishizaka ,  Takashi Sakuma ,  Osamu Yokoyama ,  Kenji Matsumoto ,  Peng Chang ,  Hiroyuki Nagai

IPC: H01L21/4763 ,  H01L21/768 ,  H01L21/285 ,  H01L23/532

CPC classification number: H01L21/76877 ,  H01L21/2855 ,  H01L21/28556 ,  H01L21/28568 ,  H01L21/76826 ,  H01L21/76831 ,  H01L21/76843 ,  H01L21/76876 ,  H01L23/53238 ,  H01L2924/0002 ,  H01L2924/00

Abstract: A method of forming a copper wiring buried in a recess portion of a predetermined pattern formed in an interlayer insulation layer of a substrate is disclosed. The method includes: forming a manganese oxide film at least on a surface of the recess portion, the manganese oxide film serving as a self-aligned barrier film through reaction with the interlayer insulation layer; performing hydrogen radical treatment with respect to a surface of the manganese oxide film; placing a metal more active than ruthenium on the surface of the manganese oxide film after the hydrogen radical treatment; forming a ruthenium film on the surface where the metal more active than ruthenium is present; and forming a copper film on the ruthenium film by physical vapor deposition (PVD) to bury the copper film in the recess portion.

Abstract translation: 公开了一种埋设在衬底的层间绝缘层中形成的预定图案的凹部中的铜布线的形成方法。 该方法包括：通过与层间绝缘层反应，至少在凹部的表面上形成氧化锰膜，氧化锰膜作为自对准阻挡膜; 相对于氧化锰膜的表面进行氢自由基处理; 在氧自由基处理之后，将比钌更金属的氧化物膜置于氧化锰膜的表面上; 在其上存在比钌更有活性的金属的表面上形成钌膜; 并通过物理气相沉积（PVD）在钌膜上形成铜膜以将铜膜埋入凹部中。

公开(公告)号：US10096548B2

公开(公告)日：2018-10-09

申请号：US15072165

申请日：2016-03-16

Applicant: Tokyo Electron Limited

Inventor： Kenji Matsumoto ,  Tadahiro Ishizaka ,  Peng Chang ,  Osamu Yokoyama ,  Takashi Sakuma ,  Hiroyuki Nagai

IPC: H01L21/768 ,  H01L23/532 ,  H01L21/285

Abstract: In a Cu wiring manufacturing method, a MnOx film which becomes a self-formed barrier film by reaction with an interlayer insulating film of a substrate is formed on a surface of a recess formed in the interlayer insulating film by ALD. A hydrogen radical process is performed on a surface of the MnOx film to reduce the surface of the MnOx film. A Ru film is formed by CVD on the surface of the MnOx film which has been reduced by the hydrogen radical process. A Cu-based film is formed on the Ru film by PVD to be filled in the recess. When the Ru film is formed, a film-formation condition of the MnOx film and a condition of the hydrogen radical process are set such that nucleus formation is facilitated and the Ru film is formed in a state where a surface smoothness is high.

公开(公告)号：US09735046B2

公开(公告)日：2017-08-15

申请号：US15250109

申请日：2016-08-29

Applicant: TOKYO ELECTRON LIMITED

Inventor： Peng Chang ,  Kenji Matsumoto ,  Hiroyuki Nagai

IPC: H01L21/768 ,  H01L23/522 ,  H01L23/532

CPC classification number: H01L21/76814 ,  H01L21/2855 ,  H01L21/28562 ,  H01L21/76823 ,  H01L21/76826 ,  H01L21/76831 ,  H01L21/76832 ,  H01L21/7684 ,  H01L21/76843 ,  H01L21/76873 ,  H01L21/76879 ,  H01L21/76882 ,  H01L23/5226 ,  H01L23/53228 ,  H01L23/53238

Abstract: A method of manufacturing a semiconductor device includes preparing a substrate having an interlayer insulating film and a hard mask provided on the interlayer insulating film and having a predetermined pattern, etching the interlayer insulating film to form a trench, forming a MnOx film through an ALD method in a state where the hard mask is left on the interlayer insulating film, the MnOx film being turned into a self-forming barrier film by reacting with the interlayer insulating film, performing a hydrogen radical processing on the MnOx film, forming a Ru film through a CVD method, forming a Cu-based film through a PVD method or by forming a Cu seed through the PVD method, and then performing a Cu plating processing so as to embed the Cu-based film within the trench, and performing a CMP method to remove the hard mask and to form a Cu wiring.

公开(公告)号：US20180047624A1

公开(公告)日：2018-02-15

申请号：US15553608

申请日：2016-01-07

Applicant: Tokyo Electron Limited

Inventor： Hiroyuki Nagai ,  Peng Chang ,  Kenji Matsumoto

IPC: H01L21/768 ,  C23C16/56 ,  C23C16/46 ,  H01L23/528 ,  C23C14/14 ,  C23C14/58 ,  H01L21/285 ,  H01L23/532 ,  C23C16/06 ,  C23C14/34

CPC classification number: H01L21/76882 ,  C23C14/025 ,  C23C14/046 ,  C23C14/165 ,  C23C14/34 ,  C23C14/5806 ,  C23C16/045 ,  C23C16/06 ,  C23C16/56 ,  H01L21/28 ,  H01L21/3205 ,  H01L21/768 ,  H01L21/76843 ,  H01L21/76853 ,  H01L21/76876 ,  H01L21/76883 ,  H01L23/5283 ,  H01L23/532 ,  H01L23/53228 ,  H01L23/53238

Abstract: A method of forming, on a substrate having on a surface thereof a film having a trench of a preset pattern and a via at a bottom of the trench, a Cu wiring by burying Cu or Cu alloy in the trench and the via includes forming a barrier film (process 2); forming, on a surface of the barrier film, a wetting target layer of Ru or the like (process 3); forming, on a surface of the wetting target layer, a Cu-based seed film by PVD (process 4); filling the via by heating the substrate and flowing the Cu-based seed film into the via (process 5); and forming, on the substrate surface, a Cu-based film made of the Cu or Cu alloy by PVD under a condition where the Cu-based film is flown on the wetting target layer to bury the Cu-based film in the trench (process 6).

公开(公告)号：US09136132B2

公开(公告)日：2015-09-15

申请号：US14140889

申请日：2013-12-26

Applicant: TOKYO ELECTRON LIMITED

Inventor： Kenji Matsumoto ,  Peng Chang

IPC: H01L21/20 ,  H01L21/36 ,  H01L21/285 ,  H01L23/532 ,  H01L21/67 ,  H01L21/768 ,  C23C16/18 ,  C23C16/40

CPC classification number: H01L21/28556 ,  C23C16/18 ,  C23C16/40 ,  H01L21/67207 ,  H01L21/76814 ,  H01L21/76828 ,  H01L21/76831 ,  H01L21/76846 ,  H01L21/76855 ,  H01L21/76867 ,  H01L21/76882 ,  H01L23/53238 ,  H01L23/53266 ,  H01L2924/0002 ,  H01L2924/00

Abstract: A manganese metal film forming method includes: degassing an underlying layer formed on a processing target by thermally treating the processing target, the underlying layer containing silicon and oxygen; and forming a manganese metal film on the degassed underlying layer by chemical deposition using a gas containing a manganese compound. Forming a manganese metal film includes introducing a gas containing an oxidizing agent to form a partially-oxidized manganese metal film.

Abstract translation: 锰金属膜形成方法包括：通过热处理处理目标，含有硅和氧的下层，对形成在处理目标上的下层进行脱气; 以及通过使用含有锰化合物的气体进行化学沉积在脱气的下层上形成锰金属膜。 形成锰金属膜包括引入含氧化剂的气体以形成部分氧化的锰金属膜。