公开(公告)号：US11093167B2

公开(公告)日：2021-08-17

申请号：US16352021

申请日：2019-03-13

申请人： TOSHIBA MEMORY CORPORATION

发明人： Hayato Masubuchi

IPC分类号： G06F3/06 ,  G11C16/30 ,  G01K3/10 ,  G01K1/022 ,  G11C16/04

摘要： According to one embodiment, a controller acquires temperature data periodically while receiving a first mode designating signal, writes the temperature data into a nonvolatile storage while or after the first mode designating signal, acquires temperature data after a lapse of a predetermined time from designation of the second mode, writes the temperature data into the nonvolatile storage while or after a lapse of a predetermined time since the designation of the second mode, acquires temperature data at a timing of changing from the second mode to the first mode, and write the acquired temperature data into the nonvolatile storage at or after the timing of changing from the second mode to the first mode.

公开(公告)号：US09754632B2

公开(公告)日：2017-09-05

申请号：US15254825

申请日：2016-09-01

申请人： Toshiba Memory Corporation

发明人： Hayato Masubuchi ,  Naoki Kimura ,  Manabu Matsumoto ,  Toyota Morimoto

IPC分类号： G11C5/02 ,  H05K3/30 ,  H01L23/498 ,  H01L27/115 ,  H01L23/552 ,  H01L23/00 ,  H01L25/065 ,  H05K1/18 ,  H01L23/31 ,  H05K1/02

CPC分类号： H01L25/18 ,  G11C5/02 ,  H01L23/3121 ,  H01L23/3142 ,  H01L23/49822 ,  H01L23/49838 ,  H01L23/5286 ,  H01L23/552 ,  H01L23/562 ,  H01L25/0655 ,  H01L25/50 ,  H01L27/115 ,  H01L2924/0002 ,  H05K1/0225 ,  H05K1/0271 ,  H05K1/0298 ,  H05K1/181 ,  H05K3/305 ,  H05K2201/09136 ,  H05K2201/09681 ,  H05K2201/10159 ,  Y02P70/613 ,  H01L2924/00

摘要： According to one embodiment, a semiconductor memory system includes a substrate, a plurality of elements and an adhesive portion. The substrate has a multilayer structure in which wiring patterns are formed, and has a substantially rectangle shape in a planar view. The elements are provided and arranged along the long-side direction of a surface layer side of the substrate. The adhesive portion is filled in a gap between the elements and in a gap between the elements and the substrate, where surfaces of the elements are exposed.

公开(公告)号：US10388640B2

公开(公告)日：2019-08-20

申请号：US15822039

申请日：2017-11-24

申请人： Toshiba Memory Corporation

发明人： Hayato Masubuchi ,  Naoki Kimura ,  Manabu Matsumoto ,  Toyota Morimoto

IPC分类号： G11C5/02 ,  H01L25/18 ,  H05K1/02 ,  H05K3/30 ,  H01L23/498 ,  H01L27/115 ,  H01L23/31 ,  H01L23/552 ,  H01L23/00 ,  H01L25/065 ,  H05K1/18 ,  H01L23/528 ,  H01L25/00

摘要： According to one embodiment, a semiconductor memory system includes a substrate, a plurality of elements and an adhesive portion. The substrate has a multilayer structure in which wiring patterns are formed, and has a substantially rectangle shape in a planar view. The elements are provided and arranged along the long-side direction of a surface layer side of the substrate. The adhesive portion is filled in a gap between the elements and in a gap between the elements and the substrate, where surfaces of the elements are exposed.

公开(公告)号：US11063031B2

公开(公告)日：2021-07-13

申请号：US16800398

申请日：2020-02-25

申请人： Toshiba Memory Corporation

发明人： Hayato Masubuchi ,  Naoki Kimura ,  Manabu Matsumoto ,  Toyota Morimoto

IPC分类号： G11C5/06 ,  H01L25/18 ,  H05K1/02 ,  H05K3/30 ,  H01L23/498 ,  H01L27/115 ,  G11C5/02 ,  H01L23/31 ,  H01L23/552 ,  H01L23/00 ,  H01L25/065 ,  H05K1/18 ,  H01L23/528 ,  H01L25/00

摘要： According to one embodiment, a semiconductor memory system includes a substrate, a plurality of elements and an adhesive portion. The substrate has a multilayer structure in which wiring patterns are formed, and has a substantially rectangle shape in a planar view. The elements are provided and arranged along the long-side direction of a surface layer side of the substrate. The adhesive portion is filled in a gap between the elements and in a gap between the elements and the substrate, where surfaces of the elements are exposed.

公开(公告)号：US10607979B2

公开(公告)日：2020-03-31

申请号：US16502288

申请日：2019-07-03

申请人： Toshiba Memory Corporation

发明人： Hayato Masubuchi ,  Naoki Kimura ,  Manabu Matsumoto ,  Toyota Morimoto

IPC分类号： G11C5/06 ,  H01L25/18 ,  H05K1/02 ,  H05K3/30 ,  H01L23/498 ,  H01L27/115 ,  G11C5/02 ,  H01L23/31 ,  H01L23/552 ,  H01L23/00 ,  H01L25/065 ,  H05K1/18 ,  H01L23/528 ,  H01L25/00

摘要： According to one embodiment, a semiconductor memory system includes a substrate, a plurality of elements and an adhesive portion. The substrate has a multilayer structure in which wiring patterns are formed, and has a substantially rectangle shape in a planar view. The elements are provided and arranged along the long-side direction of a surface layer side of the substrate. The adhesive portion is filled in a gap between the elements and in a gap between the elements and the substrate, where surfaces of the elements are exposed.

公开(公告)号：US09859264B2

公开(公告)日：2018-01-02

申请号：US15378947

申请日：2016-12-14

申请人： Toshiba Memory Corporation

发明人： Hayato Masubuchi ,  Naoki Kimura ,  Manabu Matsumoto ,  Toyota Morimoto

IPC分类号： G11C5/06 ,  H01L25/18 ,  H01L23/498 ,  H01L27/115 ,  H01L25/00 ,  H01L23/528 ,  H05K1/02 ,  H05K3/30

CPC分类号： H01L25/18 ,  G11C5/02 ,  H01L23/3121 ,  H01L23/3142 ,  H01L23/49822 ,  H01L23/49838 ,  H01L23/5286 ,  H01L23/552 ,  H01L23/562 ,  H01L25/0655 ,  H01L25/50 ,  H01L27/115 ,  H01L2924/0002 ,  H05K1/0225 ,  H05K1/0271 ,  H05K1/0298 ,  H05K1/181 ,  H05K3/305 ,  H05K2201/09136 ,  H05K2201/09681 ,  H05K2201/10159 ,  Y02P70/613 ,  H01L2924/00

摘要： According to one embodiment, a semiconductor memory system includes a substrate, a plurality of elements and an adhesive portion. The substrate has a multilayer structure in which wiring patterns are formed, and has a substantially rectangle shape in a planar view. The elements are provided and arranged along the long-side direction of a surface layer side of the substrate. The adhesive portion is filled in a gap between the elements and in a gap between the elements and the substrate, where surfaces of the elements are exposed.