公开(公告)号：US10510770B2

公开(公告)日：2019-12-17

申请号：US16127763

申请日：2018-09-11

Applicant: TOSHIBA MEMORY CORPORATION

Inventor： Hisashi Harada ,  Jun Nishimura ,  Ayaha Hachisuga ,  Hiroshi Nakaki ,  Yukie Miyazaki ,  Keisuke Suda ,  Yu Hirotsu

IPC: H01L27/11582 ,  H01L29/06 ,  H01L27/11565 ,  H01L23/528 ,  H01L29/10 ,  H01L21/28 ,  H01L27/11551 ,  H01L27/11578 ,  H01L23/522 ,  H01L27/24 ,  H01L27/06 ,  H01L21/822 ,  H01L21/02 ,  H01L29/66 ,  H01L29/51 ,  H01L21/311 ,  H01L21/027

Abstract: A semiconductor device includes a base body portion, a stacked body, a pedestal portion, a plate portion, and first and second columnar portions. The base body portion includes a doped semiconductor film and a semiconductor portion. The doped semiconductor film includes first and second portions. The semiconductor portion includes a first region overlapping the first portion, and a second region overlapping the second portion and being a body different from the first region. The pedestal portion is provided in the second region. The plate portion contacts the pedestal portion and the first region. The first columnar portion includes a semiconductor layer. The semiconductor layer is adjacent to the plate portion with the stacked body interposed, and contacts the first region. The second columnar portion is adjacent to the plate portion with the stacked body interposed, and is adjacent to the pedestal portion with the second region interposed.

公开(公告)号：US20190355742A1

公开(公告)日：2019-11-21

申请号：US16296276

申请日：2019-03-08

Applicant: TOSHIBA MEMORY CORPORATION

Inventor： Takayuki MARUYAMA ,  Yoshiaki Fukuzumi ,  Yuki Sugiura ,  Shinya Arai ,  Fumie Kikushima ,  Keisuke Suda ,  Takashi Ishida

IPC: H01L27/11582 ,  H01L27/11519 ,  H01L27/11556 ,  H01L27/11565 ,  H01L21/768

Abstract: A semiconductor memory device includes a plurality of electrode layers stacked above a first semiconductor layer, a second semiconductor layer and a first film. The second semiconductor layer extends through the plurality of electrode layers in a stacking direction of the plurality of electrode layers. The second semiconductor layer includes an end portion inside the first semiconductor layer. The first film is positioned inside the first semiconductor layer and contacts the first semiconductor layer. The first semiconductor layer includes a first portion, a second portion, and a third portion. The first film is positioned between the first portion and the second portion. The third portion links the first portion and the second portion. The third portion is positioned between the first film and the second semiconductor layer. The second semiconductor layer includes a contact portion contacting the third portion of the first semiconductor layer.