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公开(公告)号:US20210384214A1
公开(公告)日:2021-12-09
申请号:US17405700
申请日:2021-08-18
Applicant: Toshiba Memory Corporation
Inventor: Takuya INATSUKA , Tadashi IGUCHI , Murato KAWAI , Hisashi KATO , Megumi ISHIDUKI
IPC: H01L27/11565 , H01L27/11524 , H01L27/11556 , H01L27/11519 , H01L27/1157 , H01L27/11582 , H01L27/11575 , H01L27/11548
Abstract: According to one embodiment, a semiconductor memory device includes a first conductive layer, a first semiconductor body, a second semiconductor body, a first memory layer, and a second memory layer. The first conductive layer includes first to fourth extension regions, and a first connection region. The first extension region extends in a first direction. The second extension region extends in the first direction and is arranged with the first extension region in the first direction. The third extension region extends in the first direction and is arranged with the first extension region in a second direction crossing the first direction. The fourth extension region extends in the first direction, is arranged with the third extension region in the first direction, and is arranged with the second extension region in the second direction.
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公开(公告)号:US20190296117A1
公开(公告)日:2019-09-26
申请号:US16130432
申请日:2018-09-13
Applicant: TOSHIBA MEMORY CORPORATION
Inventor: Megumi ISHIDUKI , Hiroshi NAKAKI , Takamasa ITO
IPC: H01L29/423 , H01L29/66 , H01L29/792 , H01L27/11582 , H01L27/11565 , H01L27/11575
Abstract: A semiconductor device includes a base body, a stacked body on the base body and a first columnar part. The base body includes a substrate, a first insulating film on the substrate, a first conductive film on the first insulating film, and a first semiconductor part on the first conductive film. The stacked body includes conductive layers and insulating layers stacked alternately in a stacking direction. The first columnar part is provided inside the stacked body and the first semiconductor part. The first columnar part includes a semiconductor body and a memory film between the semiconductor body and conductive layers. The semiconductor body extends in the stacking direction. The first columnar part has a first diameter and a second diameter in a first direction crossing the stacking direction. The first diameter inside the first semiconductor part is larger than the second diameter inside the stacked body.
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公开(公告)号:US20180076211A1
公开(公告)日:2018-03-15
申请号:US15462118
申请日:2017-03-17
Applicant: Toshiba Memory Corporation
Inventor: Takuya INATSUKA , Tadashi IGUCHI , Murato KAWAI , Hisashi KATO , Megumi ISHIDUKI
IPC: H01L27/11565 , H01L27/11524 , H01L27/11556 , H01L27/11519 , H01L27/1157 , H01L27/11582
CPC classification number: H01L27/11565 , H01L27/11519 , H01L27/11524 , H01L27/11548 , H01L27/11556 , H01L27/1157 , H01L27/11575 , H01L27/11582
Abstract: According to one embodiment, a semiconductor memory device includes a first conductive layer, a first semiconductor body, a second semiconductor body, a first memory layer, and a second memory layer. The first conductive layer includes first to fourth extension regions, and a first connection region. The first extension region extends in a first direction. The second extension region extends in the first direction and is arranged with the first extension region in the first direction. The third extension region extends in the first direction and is arranged with the first extension region in a second direction crossing the first direction. The fourth extension region extends in the first direction, is arranged with the third extension region in the first direction, and is arranged with the second extension region in the second direction.
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公开(公告)号:US20180240814A1
公开(公告)日:2018-08-23
申请号:US15960842
申请日:2018-04-24
Applicant: TOSHIBA MEMORY CORPORATION
Inventor: Yoshiaki FUKUZUMI , Ryota KATSUMATA , Masaru KIDOH , Masaru KITO , Hiroyasu TANAKA , Yosuke KOMORI , Megumi ISHIDUKI , Hideaki AOCHI
IPC: H01L27/11582 , H01L27/11573 , G11C16/04
CPC classification number: H01L27/11582 , G11C16/0483 , H01L27/1052 , H01L27/11551 , H01L27/11556 , H01L27/11573 , H01L27/11575 , H01L27/11578 , H01L29/513
Abstract: A non-volatile semiconductor storage device has a plurality of memory strings to each of which a plurality of electrically rewritable memory cells are connected in series. Each of the memory strings includes first semiconductor layers each having a pair of columnar portions extending in a vertical direction with respect to a substrate and a coupling portion formed to couple the lower ends of the pair of columnar portions; a charge storage layer formed to surround the side surfaces of the columnar portions; and first conductive layers formed to surround the side surfaces of the columnar portions and the charge storage layer. The first conductive layers function as gate electrodes of the memory cells.
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