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公开(公告)号：US10797072B2
公开(公告)日：2020-10-06
申请号：US16281202
申请日：2019-02-21
发明人： Takuya Inatsuka , Taichi Iwasaki , Osamu Matsuura
IPC分类号： H01L27/11582 , H01L29/36 , H01L29/08 , H01L29/10 , H01L29/49 , H01L29/04 , H01L27/11573 , H01L27/11565 , H01L27/11568 , H01L29/51 , H01L29/167 , H01L21/02 , H01L21/266 , H01L21/265 , H01L21/027 , H01L21/324 , H01L21/311
摘要： A semiconductor device according to an embodiment includes an N-well region, a first gate electrode, a columnar epitaxial layer, and a first contact. The N-well region includes two P-type impurity diffusion regions. The first gate electrode is provided above the N-well region between the two P-type impurity diffusion regions. The first gate electrode are opposed to the N-well region via a gate insulating film. The columnar epitaxial layer is provided on the P-type impurity diffusion region. The epitaxial layer includes a first semiconductor layer including P-type impurities. The first contact is provided on the first semiconductor layer of the epitaxial layer.
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公开(公告)号：US20200083246A1
公开(公告)日：2020-03-12
申请号：US16281202
申请日：2019-02-21
发明人： Takuya Inatsuka , Taichi Iwasaki , Osamu Matsuura
IPC分类号： H01L27/11582 , H01L29/167 , H01L29/36 , H01L29/08 , H01L29/10 , H01L29/49 , H01L29/04 , H01L27/11573 , H01L27/11565 , H01L27/11568 , H01L29/51
摘要： A semiconductor device according to an embodiment includes an N-well region, a first gate electrode, a columnar epitaxial layer, and a first contact. The N-well region includes two P-type impurity diffusion regions. The first gate electrode is provided above the N-well region between the two P-type impurity diffusion regions. The first gate electrode are opposed to the N-well region via a gate insulating film. The columnar epitaxial layer is provided on the P-type impurity diffusion region. The epitaxial layer includes a first semiconductor layer including P-type impurities. The first contact is provided on the first semiconductor layer of the epitaxial layer.
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公开(公告)号：US10553600B2
公开(公告)日：2020-02-04
申请号：US15903448
申请日：2018-02-23
发明人： Takuya Inatsuka , Tadashi Iguchi , Murato Kawai , Hisashi Kato , Megumi Ishiduki
IPC分类号： H01L27/11565 , H01L27/11524 , H01L27/11556 , H01L27/11519 , H01L27/1157 , H01L27/11582
摘要： According to one embodiment, a semiconductor memory device includes a first conductive layer, a first semiconductor body, a second semiconductor body, a first memory layer, and a second memory layer. The first conductive layer includes first to fourth extension regions, and a first connection region. The first extension region extends in a first direction. The second extension region extends in the first direction and is arranged with the first extension region in the first direction. The third extension region extends in the first direction and is arranged with the first extension region in a second direction crossing the first direction. The fourth extension region extends in the first direction, is arranged with the third extension region in the first direction, and is arranged with the second extension region in the second direction.
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公开(公告)号：US20190393236A1
公开(公告)日：2019-12-26
申请号：US16129101
申请日：2018-09-12
发明人： Hajime Kaneko , Takuya Inatsuka , Hideki Inokuma
IPC分类号： H01L27/11582 , H01L27/11573 , H01L27/1157
摘要： A semiconductor memory device includes a first member spreading along a first direction and a second direction, a stacked body provided on a third-direction side when viewed from the first member, and a second member provided inside the first member and exposed at a surface of the first member on the third-direction side. A configuration of an end portion in the first direction of the stacked body is a staircase configuration having terraces formed every conductive film. The second member is made from a material different from a material of the first member. The second member is totally disposed in a region opposing a total length of an end edge of the stacked body on the first-direction side, and not disposed in an outer region of the stacked body on the second-direction side.
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公开(公告)号：US11139312B2
公开(公告)日：2021-10-05
申请号：US16291448
申请日：2019-03-04
发明人： Osamu Matsuura , Taichi Iwasaki , Takuya Inatsuka
IPC分类号： H01L27/11582 , H01L27/11565 , H01L27/1157 , H01L23/532 , H01L23/522 , H01L23/528 , H01L21/28
摘要： A semiconductor device according to an embodiment includes an N-well region, a first gate electrode, a single-crystal first semiconductor, and a first contact. The N-well region includes two P-type impurity diffusion regions. The first gate electrode is provided above the N-well region between the two P-type impurity diffusion regions. The first gate electrode is opposed to the N-well region via a gate insulating film. The single-crystal first semiconductor is provided in a columnar shape on the P-type impurity diffusion region. The first contact includes a polycrystalline second semiconductor. The second semiconductor is provided on the first semiconductor and includes P-type impurities.
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公开(公告)号：US11127750B2
公开(公告)日：2021-09-21
申请号：US16731208
申请日：2019-12-31
发明人： Takuya Inatsuka , Tadashi Iguchi , Murato Kawai , Hisashi Kato , Megumi Ishiduki
IPC分类号： H01L27/11565 , H01L27/11524 , H01L27/11556 , H01L27/11519 , H01L27/1157 , H01L27/11582 , H01L27/11575 , H01L27/11548
摘要： According to one embodiment, a semiconductor memory device includes a first conductive layer, a first semiconductor body, a second semiconductor body, a first memory layer, and a second memory layer. The first conductive layer includes first to fourth extension regions, and a first connection region. The first extension region extends in a first direction. The second extension region extends in the first direction and is arranged with the first extension region in the first direction. The third extension region extends in the first direction and is arranged with the first extension region in a second direction crossing the first direction. The fourth extension region extends in the first direction, is arranged with the third extension region in the first direction, and is arranged with the second extension region in the second direction.
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公开(公告)号：US10804286B2
公开(公告)日：2020-10-13
申请号：US16111402
申请日：2018-08-24
发明人： Kazuhide Takamura , Takuya Inatsuka
IPC分类号： H01L27/11582 , H01L23/522 , H01L23/528 , H01L29/10 , H01L27/11568 , H01L21/311 , H01L21/02 , H01L21/768 , H01L21/033
摘要： According to one embodiment, a semiconductor device includes: a stack body including an insulator, a first conductor and a second conductor stacked stepwise by interposing the insulator and electrically disconnected from each other; and a first contact plug which reaches the first conductor from a region above the stack body. The first conductor includes a first portion positioned below the insulator, a second portion positioned above the insulator, and a third portion that electrically connects the first portion of the first conductor and the second portion of the first conductor. The third portion of the first conductor is provided in an opening formed on the insulator.
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公开(公告)号：US09935118B1
公开(公告)日：2018-04-03
申请号：US15462118
申请日：2017-03-17
发明人： Takuya Inatsuka , Tadashi Iguchi , Murato Kawai , Hisashi Kato , Megumi Ishiduki
IPC分类号： H01L27/11565 , H01L27/11524 , H01L27/11556 , H01L27/11519 , H01L27/1157 , H01L27/11582
CPC分类号： H01L27/11565 , H01L27/11519 , H01L27/11524 , H01L27/11548 , H01L27/11556 , H01L27/1157 , H01L27/11575 , H01L27/11582
摘要： According to one embodiment, a semiconductor memory device includes a first conductive layer, a first semiconductor body, a second semiconductor body, a first memory layer, and a second memory layer. The first conductive layer includes first to fourth extension regions, and a first connection region. The first extension region extends in a first direction. The second extension region extends in the first direction and is arranged with the first extension region in the first direction. The third extension region extends in the first direction and is arranged with the first extension region in a second direction crossing the first direction. The fourth extension region extends in the first direction, is arranged with the third extension region in the first direction, and is arranged with the second extension region in the second direction.
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公开(公告)号：US20200091064A1
公开(公告)日：2020-03-19
申请号：US16352295
申请日：2019-03-13
发明人： Taichi IWASAKI , Osamu Matsuura , Takuya Inatsuka
IPC分类号： H01L23/528 , H01L27/105 , H01L23/532 , H01L23/522
摘要： According to one embodiment, there is provided a semiconductor device including a stacked body, a silicon nitride film, and a titanium film. The stacked body is disposed above a substrate. The stacked body includes a conductive layer and an insulating layer disposed repeatedly in a stacking direction. The silicon nitride film extends along a surface of the substrate between the substrate and the stacked body. The titanium film extends along the surface of the substrate between the substrate and the stacked body. The titanium film constitutes a film continuous with the silicon nitride film.
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公开(公告)号：US20200083249A1
公开(公告)日：2020-03-12
申请号：US16291448
申请日：2019-03-04
发明人： Osamu Matsuura , Taichi Iwasaki , Takuya Inatsuka
IPC分类号： H01L27/11582 , H01L27/11565 , H01L27/1157 , H01L21/28 , H01L23/522 , H01L23/528 , H01L23/532
摘要： A semiconductor device according to an embodiment includes an N-well region, a first gate electrode, a single-crystal first semiconductor, and a first contact. The N-well region includes two P-type impurity diffusion regions. The first gate electrode is provided above the N-well region between the two P-type impurity diffusion regions. The first gate electrode is opposed to the N-well region via a gate insulating film. The single-crystal first semiconductor is provided in a columnar shape on the P-type impurity diffusion region. The first contact includes a polycrystalline second semiconductor. The second semiconductor is provided on the first semiconductor and includes P-type impurities.
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